[dynarmic] use bitset<32> instead of vector for ABI regset allocations (#3507)
HLE macro does this, may as well do it on dynarm as well :) could improve perf a bit Signed-off-by: lizzie <lizzie@eden-emu.dev> Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/3507 Reviewed-by: crueter <crueter@eden-emu.dev> Reviewed-by: CamilleLaVey <camillelavey99@gmail.com> Reviewed-by: DraVee <dravee@eden-emu.dev> Co-authored-by: lizzie <lizzie@eden-emu.dev> Co-committed-by: lizzie <lizzie@eden-emu.dev>
This commit is contained in:
lizzie
crueter
parent
40251c2115
commit
b45c78a051
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@ -102,19 +102,14 @@ A32EmitX64::BlockDescriptor A32EmitX64::Emit(IR::Block& block) {
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}
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code.EnableWriting();
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const boost::container::static_vector<HostLoc, 28> gpr_order = [this] {
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boost::container::static_vector<HostLoc, 28> gprs{any_gpr};
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if (conf.fastmem_pointer) {
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gprs.erase(std::find(gprs.begin(), gprs.end(), HostLoc::R13));
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}
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if (conf.page_table) {
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gprs.erase(std::find(gprs.begin(), gprs.end(), HostLoc::R14));
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}
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new (&this->reg_alloc) RegAlloc([this] {
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std::bitset<32> gprs{any_gpr};
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if (conf.fastmem_pointer)
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gprs.reset(size_t(HostLoc::R13));
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if (conf.page_table)
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gprs.reset(size_t(HostLoc::R14));
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return gprs;
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}();
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new (&this->reg_alloc) RegAlloc(gpr_order, any_xmm);
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}(), any_xmm);
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A32EmitContext ctx{conf, reg_alloc, block};
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// Start emitting.
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@ -76,18 +76,14 @@ A64EmitX64::BlockDescriptor A64EmitX64::Emit(IR::Block& block) noexcept {
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}
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code.EnableWriting();
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const boost::container::static_vector<HostLoc, 28> gpr_order = [this] {
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boost::container::static_vector<HostLoc, 28> gprs{any_gpr};
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if (conf.fastmem_pointer) {
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gprs.erase(std::find(gprs.begin(), gprs.end(), HostLoc::R13));
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}
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if (conf.page_table) {
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gprs.erase(std::find(gprs.begin(), gprs.end(), HostLoc::R14));
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}
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new (&this->reg_alloc) RegAlloc{[this] {
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std::bitset<32> gprs = any_gpr;
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if (conf.fastmem_pointer)
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gprs.reset(size_t(HostLoc::R13));
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if (conf.page_table)
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gprs.reset(size_t(HostLoc::R14));
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return gprs;
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}();
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new (&this->reg_alloc) RegAlloc{gpr_order, any_xmm};
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}(), any_xmm};
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A64EmitContext ctx{conf, reg_alloc, block};
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// Start emitting.
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@ -188,7 +184,7 @@ void A64EmitX64::ClearFastDispatchTable() {
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void A64EmitX64::GenTerminalHandlers() {
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// PC ends up in rcx, location_descriptor ends up in rbx
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static_assert(std::find(ABI_ALL_CALLEE_SAVE.begin(), ABI_ALL_CALLEE_SAVE.end(), HostLoc::R12) != ABI_ALL_CALLEE_SAVE.end());
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//static_assert(ABI_ALL_CALLEE_SAVE.test(size_t(HostLoc::R12)));
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const auto calculate_location_descriptor = [this] {
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// This calculation has to match up with A64::LocationDescriptor::UniqueHash
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// TODO: Optimization is available here based on known state of fpcr.
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@ -40,59 +40,53 @@ static FrameInfo CalculateFrameInfo(const size_t num_gprs, const size_t num_xmms
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};
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}
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template<typename RegisterArrayT>
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void ABI_PushRegistersAndAdjustStack(BlockOfCode& code, const size_t frame_size, const RegisterArrayT& regs) {
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void ABI_PushRegistersAndAdjustStack(BlockOfCode& code, const size_t frame_size, std::bitset<32> const& regs) {
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using namespace Xbyak::util;
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const size_t num_gprs = std::count_if(regs.begin(), regs.end(), HostLocIsGPR);
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const size_t num_xmms = std::count_if(regs.begin(), regs.end(), HostLocIsXMM);
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const size_t num_gprs = (ABI_ALL_GPRS & regs).count();
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const size_t num_xmms = (ABI_ALL_XMMS & regs).count();
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const FrameInfo frame_info = CalculateFrameInfo(num_gprs, num_xmms, frame_size);
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for (auto const gpr : regs)
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if (HostLocIsGPR(gpr))
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code.push(HostLocToReg64(gpr));
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for (size_t i = 0; i < regs.size(); ++i)
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if (regs[i] && HostLocIsGPR(HostLoc(i)))
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code.push(HostLocToReg64(HostLoc(i)));
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if (frame_info.stack_subtraction != 0)
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code.sub(rsp, u32(frame_info.stack_subtraction));
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size_t xmm_offset = frame_info.xmm_offset;
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for (auto const xmm : regs) {
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if (HostLocIsXMM(xmm)) {
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for (size_t i = 0; i < regs.size(); ++i) {
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if (regs[i] && HostLocIsXMM(HostLoc(i))) {
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if (code.HasHostFeature(HostFeature::AVX)) {
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code.vmovaps(code.xword[rsp + xmm_offset], HostLocToXmm(xmm));
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code.vmovaps(code.xword[rsp + xmm_offset], HostLocToXmm(HostLoc(i)));
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} else {
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code.movaps(code.xword[rsp + xmm_offset], HostLocToXmm(xmm));
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code.movaps(code.xword[rsp + xmm_offset], HostLocToXmm(HostLoc(i)));
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}
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xmm_offset += XMM_SIZE;
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}
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}
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}
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template<typename RegisterArrayT>
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void ABI_PopRegistersAndAdjustStack(BlockOfCode& code, const size_t frame_size, const RegisterArrayT& regs) {
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void ABI_PopRegistersAndAdjustStack(BlockOfCode& code, const size_t frame_size, std::bitset<32> const& regs) {
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using namespace Xbyak::util;
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const size_t num_gprs = std::count_if(regs.begin(), regs.end(), HostLocIsGPR);
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const size_t num_xmms = std::count_if(regs.begin(), regs.end(), HostLocIsXMM);
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const size_t num_gprs = (ABI_ALL_GPRS & regs).count();
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const size_t num_xmms = (ABI_ALL_XMMS & regs).count();
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const FrameInfo frame_info = CalculateFrameInfo(num_gprs, num_xmms, frame_size);
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size_t xmm_offset = frame_info.xmm_offset + (num_xmms * XMM_SIZE);
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for (auto it = regs.rbegin(); it != regs.rend(); ++it) {
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auto const xmm = *it;
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if (HostLocIsXMM(xmm)) {
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for (int32_t i = regs.size() - 1; i >= 0; --i)
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if (regs[i] && HostLocIsXMM(HostLoc(i))) {
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xmm_offset -= XMM_SIZE;
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if (code.HasHostFeature(HostFeature::AVX)) {
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code.vmovaps(HostLocToXmm(xmm), code.xword[rsp + xmm_offset]);
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code.vmovaps(HostLocToXmm(HostLoc(i)), code.xword[rsp + xmm_offset]);
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} else {
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code.movaps(HostLocToXmm(xmm), code.xword[rsp + xmm_offset]);
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code.movaps(HostLocToXmm(HostLoc(i)), code.xword[rsp + xmm_offset]);
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}
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}
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}
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if (frame_info.stack_subtraction != 0)
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code.add(rsp, u32(frame_info.stack_subtraction));
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for (auto it = regs.rbegin(); it != regs.rend(); ++it) {
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auto const gpr = *it;
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if (HostLocIsGPR(gpr))
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code.pop(HostLocToReg64(gpr));
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}
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for (int32_t i = regs.size() - 1; i >= 0; --i)
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if (regs[i] && HostLocIsGPR(HostLoc(i)))
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code.pop(HostLocToReg64(HostLoc(i)));
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}
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void ABI_PushCalleeSaveRegistersAndAdjustStack(BlockOfCode& code, const std::size_t frame_size) {
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@ -112,74 +106,16 @@ void ABI_PopCallerSaveRegistersAndAdjustStack(BlockOfCode& code, const std::size
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}
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// Windows ABI registers are not in the same allocation algorithm as unix's
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#ifdef _MSC_VER
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void ABI_PushCallerSaveRegistersAndAdjustStackExcept(BlockOfCode& code, const HostLoc exception) {
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std::vector<HostLoc> regs;
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std::remove_copy(ABI_ALL_CALLER_SAVE.begin(), ABI_ALL_CALLER_SAVE.end(), std::back_inserter(regs), exception);
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std::bitset<32> regs = ABI_ALL_CALLER_SAVE;
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regs.reset(size_t(exception));
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ABI_PushRegistersAndAdjustStack(code, 0, regs);
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}
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void ABI_PopCallerSaveRegistersAndAdjustStackExcept(BlockOfCode& code, const HostLoc exception) {
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std::vector<HostLoc> regs;
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std::remove_copy(ABI_ALL_CALLER_SAVE.begin(), ABI_ALL_CALLER_SAVE.end(), std::back_inserter(regs), exception);
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std::bitset<32> regs = ABI_ALL_CALLER_SAVE;
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regs.reset(size_t(exception));
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ABI_PopRegistersAndAdjustStack(code, 0, regs);
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}
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#else
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static consteval size_t ABI_AllCallerSaveSize() noexcept {
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return ABI_ALL_CALLER_SAVE.max_size();
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}
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static consteval std::array<HostLoc, ABI_AllCallerSaveSize() - 1> ABI_AllCallerSaveExcept(const std::size_t except) noexcept {
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std::array<HostLoc, ABI_AllCallerSaveSize() - 1> arr;
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for(std::size_t i = 0; i < arr.size(); ++i) {
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arr[i] = static_cast<HostLoc>(i + (i >= except ? 1 : 0));
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}
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return arr;
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}
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alignas(64) static constinit std::array<HostLoc, ABI_AllCallerSaveSize() - 1> ABI_CALLER_SAVED_EXCEPT_TABLE[32] = {
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ABI_AllCallerSaveExcept(0),
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ABI_AllCallerSaveExcept(1),
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ABI_AllCallerSaveExcept(2),
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ABI_AllCallerSaveExcept(3),
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ABI_AllCallerSaveExcept(4),
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ABI_AllCallerSaveExcept(5),
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ABI_AllCallerSaveExcept(6),
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ABI_AllCallerSaveExcept(7),
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ABI_AllCallerSaveExcept(8),
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ABI_AllCallerSaveExcept(9),
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ABI_AllCallerSaveExcept(10),
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ABI_AllCallerSaveExcept(11),
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ABI_AllCallerSaveExcept(12),
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ABI_AllCallerSaveExcept(13),
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ABI_AllCallerSaveExcept(14),
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ABI_AllCallerSaveExcept(15),
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ABI_AllCallerSaveExcept(16),
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ABI_AllCallerSaveExcept(17),
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ABI_AllCallerSaveExcept(18),
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ABI_AllCallerSaveExcept(19),
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ABI_AllCallerSaveExcept(20),
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ABI_AllCallerSaveExcept(21),
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ABI_AllCallerSaveExcept(22),
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ABI_AllCallerSaveExcept(23),
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ABI_AllCallerSaveExcept(24),
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ABI_AllCallerSaveExcept(25),
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ABI_AllCallerSaveExcept(26),
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ABI_AllCallerSaveExcept(27),
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ABI_AllCallerSaveExcept(28),
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ABI_AllCallerSaveExcept(29),
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ABI_AllCallerSaveExcept(30),
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ABI_AllCallerSaveExcept(31),
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};
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void ABI_PushCallerSaveRegistersAndAdjustStackExcept(BlockOfCode& code, const HostLoc exception) {
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ASSUME(size_t(exception) < 32);
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ABI_PushRegistersAndAdjustStack(code, 0, ABI_CALLER_SAVED_EXCEPT_TABLE[size_t(exception)]);
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}
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void ABI_PopCallerSaveRegistersAndAdjustStackExcept(BlockOfCode& code, const HostLoc exception) {
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ASSUME(size_t(exception) < 32);
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ABI_PopRegistersAndAdjustStack(code, 0, ABI_CALLER_SAVED_EXCEPT_TABLE[size_t(exception)]);
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}
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#endif
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} // namespace Dynarmic::Backend::X64
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@ -1,4 +1,4 @@
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// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
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// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
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// SPDX-License-Identifier: GPL-3.0-or-later
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/* This file is part of the dynarmic project.
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@ -8,15 +8,52 @@
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#pragma once
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#include <array>
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#include <bitset>
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#include "dynarmic/common/common_types.h"
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#include "dynarmic/backend/x64/hostloc.h"
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namespace Dynarmic::Backend::X64 {
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class BlockOfCode;
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constexpr std::bitset<32> ABI_ALL_GPRS = BuildRegSet({
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HostLoc::RAX,
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HostLoc::RBX,
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HostLoc::RCX,
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HostLoc::RDX,
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HostLoc::RDI,
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HostLoc::RSI,
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HostLoc::RBP,
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HostLoc::RSP,
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HostLoc::R8,
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HostLoc::R9,
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HostLoc::R10,
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HostLoc::R11,
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HostLoc::R12,
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HostLoc::R13,
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HostLoc::R14,
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HostLoc::R15,
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});
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constexpr std::bitset<32> ABI_ALL_XMMS = BuildRegSet({
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HostLoc::XMM0,
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HostLoc::XMM1,
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HostLoc::XMM2,
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HostLoc::XMM3,
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HostLoc::XMM4,
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HostLoc::XMM5,
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HostLoc::XMM6,
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HostLoc::XMM7,
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HostLoc::XMM8,
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HostLoc::XMM9,
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HostLoc::XMM10,
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HostLoc::XMM11,
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HostLoc::XMM12,
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HostLoc::XMM13,
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HostLoc::XMM14,
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HostLoc::XMM15,
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});
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constexpr HostLoc ABI_JIT_PTR = HostLoc::R15;
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#ifdef _WIN32
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@ -29,7 +66,7 @@ constexpr HostLoc ABI_PARAM2 = HostLoc::RDX;
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constexpr HostLoc ABI_PARAM3 = HostLoc::R8;
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constexpr HostLoc ABI_PARAM4 = HostLoc::R9;
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constexpr std::array<HostLoc, 13> ABI_ALL_CALLER_SAVE = {
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constexpr std::bitset<32> ABI_ALL_CALLER_SAVE = BuildRegSet({
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HostLoc::RAX,
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HostLoc::RCX,
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HostLoc::RDX,
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@ -43,9 +80,9 @@ constexpr std::array<HostLoc, 13> ABI_ALL_CALLER_SAVE = {
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HostLoc::XMM3,
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HostLoc::XMM4,
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HostLoc::XMM5,
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};
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});
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constexpr std::array<HostLoc, 18> ABI_ALL_CALLEE_SAVE = {
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constexpr std::bitset<32> ABI_ALL_CALLEE_SAVE = BuildRegSet({
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HostLoc::RBX,
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HostLoc::RSI,
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HostLoc::RDI,
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@ -64,7 +101,7 @@ constexpr std::array<HostLoc, 18> ABI_ALL_CALLEE_SAVE = {
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HostLoc::XMM13,
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HostLoc::XMM14,
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HostLoc::XMM15,
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};
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});
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constexpr size_t ABI_SHADOW_SPACE = 32; // bytes
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@ -82,7 +119,7 @@ constexpr HostLoc ABI_PARAM4 = HostLoc::RCX;
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constexpr HostLoc ABI_PARAM5 = HostLoc::R8;
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constexpr HostLoc ABI_PARAM6 = HostLoc::R9;
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constexpr std::array<HostLoc, 25> ABI_ALL_CALLER_SAVE = {
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constexpr std::bitset<32> ABI_ALL_CALLER_SAVE = BuildRegSet({
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HostLoc::RAX,
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HostLoc::RCX,
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HostLoc::RDX,
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@ -108,22 +145,22 @@ constexpr std::array<HostLoc, 25> ABI_ALL_CALLER_SAVE = {
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HostLoc::XMM13,
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HostLoc::XMM14,
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HostLoc::XMM15,
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};
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});
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constexpr std::array<HostLoc, 6> ABI_ALL_CALLEE_SAVE = {
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constexpr std::bitset<32> ABI_ALL_CALLEE_SAVE = BuildRegSet({
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HostLoc::RBX,
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HostLoc::RBP,
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HostLoc::R12,
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HostLoc::R13,
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HostLoc::R14,
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HostLoc::R15,
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};
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});
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constexpr size_t ABI_SHADOW_SPACE = 0; // bytes
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#endif
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static_assert(ABI_ALL_CALLER_SAVE.size() + ABI_ALL_CALLEE_SAVE.size() == 31, "Invalid total number of registers");
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//static_assert(ABI_ALL_CALLER_SAVE.count() + ABI_ALL_CALLEE_SAVE.count() == 31, "Invalid total number of registers");
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void ABI_PushCalleeSaveRegistersAndAdjustStack(BlockOfCode& code, size_t frame_size = 0);
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void ABI_PopCalleeSaveRegistersAndAdjustStack(BlockOfCode& code, size_t frame_size = 0);
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@ -7,6 +7,9 @@
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*/
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#pragma once
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#include <bitset>
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#include <xbyak/xbyak.h>
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#include "dynarmic/common/assert.h"
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#include "dynarmic/common/common_types.h"
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#include "dynarmic/backend/x64/xbyak.h"
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@ -106,13 +109,18 @@ constexpr size_t HostLocBitWidth(HostLoc loc) {
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UNREACHABLE();
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}
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using HostLocList = std::initializer_list<HostLoc>;
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constexpr std::bitset<32> BuildRegSet(std::initializer_list<HostLoc> regs) {
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size_t bits = 0;
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for (auto const& reg : regs)
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bits |= size_t{1} << size_t(reg);
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return {bits};
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}
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// RSP is preserved for function calls
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// R13 contains fastmem pointer if any
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// R14 contains the pagetable pointer
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// R15 contains the JitState pointer
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const HostLocList any_gpr = {
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const std::bitset<32> any_gpr = BuildRegSet({
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HostLoc::RAX,
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HostLoc::RBX,
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HostLoc::RCX,
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@ -128,13 +136,13 @@ const HostLocList any_gpr = {
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HostLoc::R13,
|
||||
HostLoc::R14,
|
||||
//HostLoc::R15,
|
||||
};
|
||||
});
|
||||
|
||||
// XMM0 is reserved for use by instructions that implicitly use it as an argument
|
||||
// XMM1 is used by 128 mem accessors
|
||||
// XMM2 is also used by that (and other stuff)
|
||||
// Basically dont use either XMM0, XMM1 or XMM2 ever; they're left for the regsel
|
||||
const HostLocList any_xmm = {
|
||||
const std::bitset<32> any_xmm = BuildRegSet({
|
||||
//HostLoc::XMM1,
|
||||
//HostLoc::XMM2,
|
||||
HostLoc::XMM3,
|
||||
|
|
@ -150,7 +158,7 @@ const HostLocList any_xmm = {
|
|||
HostLoc::XMM13,
|
||||
HostLoc::XMM14,
|
||||
HostLoc::XMM15,
|
||||
};
|
||||
});
|
||||
|
||||
inline Xbyak::Reg64 HostLocToReg64(HostLoc loc) noexcept {
|
||||
ASSERT(HostLocIsGPR(loc));
|
||||
|
|
|
|||
|
|
@ -6,19 +6,19 @@
|
|||
* SPDX-License-Identifier: 0BSD
|
||||
*/
|
||||
|
||||
#include "dynarmic/backend/x64/reg_alloc.h"
|
||||
|
||||
#include <algorithm>
|
||||
#include <limits>
|
||||
#include <numeric>
|
||||
#include <utility>
|
||||
|
||||
#include <fmt/ostream.h>
|
||||
#include "dynarmic/backend/x64/hostloc.h"
|
||||
#include "dynarmic/common/assert.h"
|
||||
#include <bit>
|
||||
#include "dynarmic/backend/x64/xbyak.h"
|
||||
|
||||
#include "dynarmic/backend/x64/abi.h"
|
||||
#include "dynarmic/backend/x64/reg_alloc.h"
|
||||
#include "dynarmic/backend/x64/stack_layout.h"
|
||||
#include "dynarmic/backend/x64/verbose_debugging_output.h"
|
||||
|
||||
|
|
@ -185,9 +185,8 @@ bool Argument::IsInMemory(RegAlloc& reg_alloc) const noexcept {
|
|||
return HostLocIsSpill(*reg_alloc.ValueLocation(value.GetInst()));
|
||||
}
|
||||
|
||||
RegAlloc::RegAlloc(boost::container::static_vector<HostLoc, 28> gpr_order, boost::container::static_vector<HostLoc, 28> xmm_order) noexcept
|
||||
: gpr_order(gpr_order),
|
||||
xmm_order(xmm_order)
|
||||
RegAlloc::RegAlloc(std::bitset<32> gpr_order, std::bitset<32> xmm_order) noexcept
|
||||
: gpr_order(gpr_order), xmm_order(xmm_order)
|
||||
{}
|
||||
|
||||
RegAlloc::ArgumentInfo RegAlloc::GetArgumentInfo(const IR::Inst* inst) noexcept {
|
||||
|
|
@ -237,7 +236,7 @@ Xbyak::Xmm RegAlloc::UseScratchXmm(BlockOfCode& code, Argument& arg) noexcept {
|
|||
void RegAlloc::UseScratch(BlockOfCode& code, Argument& arg, HostLoc host_loc) noexcept {
|
||||
ASSERT(!arg.allocated);
|
||||
arg.allocated = true;
|
||||
UseScratchImpl(code, arg.value, {host_loc});
|
||||
UseScratchImpl(code, arg.value, BuildRegSet({host_loc}));
|
||||
}
|
||||
|
||||
void RegAlloc::DefineValue(BlockOfCode& code, IR::Inst* inst, const Xbyak::Reg& reg) noexcept {
|
||||
|
|
@ -258,7 +257,7 @@ void RegAlloc::Release(const Xbyak::Reg& reg) noexcept {
|
|||
LocInfo(hostloc).ReleaseOne();
|
||||
}
|
||||
|
||||
HostLoc RegAlloc::UseImpl(BlockOfCode& code, IR::Value use_value, const boost::container::static_vector<HostLoc, 28>& desired_locations) noexcept {
|
||||
HostLoc RegAlloc::UseImpl(BlockOfCode& code, IR::Value use_value, std::bitset<32> desired_locations) noexcept {
|
||||
if (use_value.IsImmediate()) {
|
||||
return LoadImmediate(code, use_value, ScratchImpl(code, desired_locations));
|
||||
}
|
||||
|
|
@ -266,8 +265,7 @@ HostLoc RegAlloc::UseImpl(BlockOfCode& code, IR::Value use_value, const boost::c
|
|||
auto const* use_inst = use_value.GetInst();
|
||||
HostLoc const current_location = *ValueLocation(use_inst);
|
||||
|
||||
const bool can_use_current_location = std::find(desired_locations.begin(), desired_locations.end(), current_location) != desired_locations.end();
|
||||
if (can_use_current_location) {
|
||||
if (HostLocIsRegister(current_location) && desired_locations.test(size_t(current_location))) {
|
||||
LocInfo(current_location).ReadLock();
|
||||
return current_location;
|
||||
}
|
||||
|
|
@ -290,7 +288,7 @@ HostLoc RegAlloc::UseImpl(BlockOfCode& code, IR::Value use_value, const boost::c
|
|||
return destination_location;
|
||||
}
|
||||
|
||||
HostLoc RegAlloc::UseScratchImpl(BlockOfCode& code, IR::Value use_value, const boost::container::static_vector<HostLoc, 28>& desired_locations) noexcept {
|
||||
HostLoc RegAlloc::UseScratchImpl(BlockOfCode& code, IR::Value use_value, std::bitset<32> desired_locations) noexcept {
|
||||
if (use_value.IsImmediate()) {
|
||||
return LoadImmediate(code, use_value, ScratchImpl(code, desired_locations));
|
||||
}
|
||||
|
|
@ -298,9 +296,7 @@ HostLoc RegAlloc::UseScratchImpl(BlockOfCode& code, IR::Value use_value, const b
|
|||
const auto* use_inst = use_value.GetInst();
|
||||
const HostLoc current_location = *ValueLocation(use_inst);
|
||||
const size_t bit_width = GetBitWidth(use_inst->GetType());
|
||||
|
||||
const bool can_use_current_location = std::find(desired_locations.begin(), desired_locations.end(), current_location) != desired_locations.end();
|
||||
if (can_use_current_location && !LocInfo(current_location).IsLocked()) {
|
||||
if (HostLocIsRegister(current_location) && desired_locations.test(size_t(current_location)) && !LocInfo(current_location).IsLocked()) {
|
||||
if (LocInfo(current_location).IsLastUse()) {
|
||||
LocInfo(current_location).is_set_last_use = true;
|
||||
} else {
|
||||
|
|
@ -317,7 +313,7 @@ HostLoc RegAlloc::UseScratchImpl(BlockOfCode& code, IR::Value use_value, const b
|
|||
return destination_location;
|
||||
}
|
||||
|
||||
HostLoc RegAlloc::ScratchImpl(BlockOfCode& code, const boost::container::static_vector<HostLoc, 28>& desired_locations) noexcept {
|
||||
HostLoc RegAlloc::ScratchImpl(BlockOfCode& code, std::bitset<32> desired_locations) noexcept {
|
||||
const HostLoc location = SelectARegister(desired_locations);
|
||||
MoveOutOfTheWay(code, location);
|
||||
LocInfo(location).WriteLock();
|
||||
|
|
@ -336,11 +332,11 @@ void RegAlloc::HostCall(
|
|||
constexpr std::array<HostLoc, args_count> args_hostloc = {ABI_PARAM1, ABI_PARAM2, ABI_PARAM3, ABI_PARAM4};
|
||||
const std::array<std::optional<Argument::copyable_reference>, args_count> args = {arg0, arg1, arg2, arg3};
|
||||
|
||||
static const boost::container::static_vector<HostLoc, 28> other_caller_save = [args_hostloc]() noexcept {
|
||||
boost::container::static_vector<HostLoc, 28> ret(ABI_ALL_CALLER_SAVE.begin(), ABI_ALL_CALLER_SAVE.end());
|
||||
ret.erase(std::find(ret.begin(), ret.end(), ABI_RETURN));
|
||||
static const std::bitset<32> other_caller_save = [args_hostloc]() noexcept {
|
||||
std::bitset<32> ret = ABI_ALL_CALLER_SAVE;
|
||||
ret.reset(size_t(ABI_RETURN));
|
||||
for (auto const hostloc : args_hostloc)
|
||||
ret.erase(std::find(ret.begin(), ret.end(), hostloc));
|
||||
ret.reset(size_t(hostloc));
|
||||
return ret;
|
||||
}();
|
||||
|
||||
|
|
@ -356,9 +352,11 @@ void RegAlloc::HostCall(
|
|||
}
|
||||
}
|
||||
// Must match with with ScratchImpl
|
||||
for (auto const gpr : other_caller_save) {
|
||||
MoveOutOfTheWay(code, gpr);
|
||||
LocInfo(gpr).WriteLock();
|
||||
for (size_t i = 0; i < other_caller_save.size(); ++i) {
|
||||
if (other_caller_save[i]) {
|
||||
MoveOutOfTheWay(code, HostLoc(i));
|
||||
LocInfo(HostLoc(i)).WriteLock();
|
||||
}
|
||||
}
|
||||
for (size_t i = 0; i < args.size(); i++) {
|
||||
if (args[i] && !args[i]->get().IsVoid()) {
|
||||
|
|
@ -397,46 +395,48 @@ void RegAlloc::ReleaseStackSpace(BlockOfCode& code, const size_t stack_space) no
|
|||
code.add(code.rsp, u32(stack_space));
|
||||
}
|
||||
|
||||
HostLoc RegAlloc::SelectARegister(const boost::container::static_vector<HostLoc, 28>& desired_locations) const noexcept {
|
||||
HostLoc RegAlloc::SelectARegister(std::bitset<32> desired_locations) const noexcept {
|
||||
// TODO(lizzie): Overspill causes issues (reads to 0 and such) on some games, I need to make a testbench
|
||||
// to later track this down - however I just modified the LRU algo so it prefers empty registers first
|
||||
// we need to test high register pressure (and spills, maybe 32 regs?)
|
||||
|
||||
static_assert(size_t(HostLoc::FirstSpill) >= 32);
|
||||
// Selects the best location out of the available locations.
|
||||
// NOTE: Using last is BAD because new REX prefix for each insn using the last regs
|
||||
// TODO: Actually do LRU or something. Currently we just try to pick something without a value if possible.
|
||||
auto min_lru_counter = size_t(-1);
|
||||
auto it_candidate = desired_locations.cend(); //default fallback if everything fails
|
||||
auto it_rex_candidate = desired_locations.cend();
|
||||
auto it_empty_candidate = desired_locations.cend();
|
||||
for (auto it = desired_locations.cbegin(); it != desired_locations.cend(); it++) {
|
||||
auto const& loc_info = LocInfo(*it);
|
||||
DEBUG_ASSERT(*it != ABI_JIT_PTR);
|
||||
// Abstain from using upper registers unless absolutely nescesary
|
||||
if (loc_info.IsLocked()) {
|
||||
// skip, not suitable for allocation
|
||||
// While R13 and R14 are technically available, we avoid allocating for them
|
||||
// at all costs, because theoretically skipping them is better than spilling
|
||||
// all over the place - it also fixes bugs with high reg pressure
|
||||
} else if (*it >= HostLoc::R13 && *it <= HostLoc::R15) {
|
||||
// skip, do not touch
|
||||
// Intel recommends to reuse registers as soon as they're overwritable (DO NOT SPILL)
|
||||
} else if (loc_info.IsEmpty()) {
|
||||
it_empty_candidate = it;
|
||||
break;
|
||||
// No empty registers for some reason (very evil) - just do normal LRU
|
||||
} else if (loc_info.lru_counter < min_lru_counter) {
|
||||
// Otherwise a "quasi"-LRU
|
||||
min_lru_counter = loc_info.lru_counter;
|
||||
if (*it >= HostLoc::R8 && *it <= HostLoc::R15) {
|
||||
it_rex_candidate = it;
|
||||
} else {
|
||||
it_candidate = it;
|
||||
auto it_candidate = HostLoc::FirstSpill; //default fallback if everything fails
|
||||
auto it_rex_candidate = HostLoc::FirstSpill;
|
||||
auto it_empty_candidate = HostLoc::FirstSpill;
|
||||
for (HostLoc i = HostLoc(0); i < HostLoc(desired_locations.size()); i = HostLoc(size_t(i) + 1)) {
|
||||
if (desired_locations.test(size_t(i))) {
|
||||
auto const& loc_info = LocInfo(i);
|
||||
DEBUG_ASSERT(i != ABI_JIT_PTR);
|
||||
// Abstain from using upper registers unless absolutely nescesary
|
||||
if (loc_info.IsLocked()) {
|
||||
// skip, not suitable for allocation
|
||||
// While R13 and R14 are technically available, we avoid allocating for them
|
||||
// at all costs, because theoretically skipping them is better than spilling
|
||||
// all over the place - i also fixes bugs with high reg pressure
|
||||
} else if (i >= HostLoc::R13 && i <= HostLoc::R15) {
|
||||
// skip, do not touch
|
||||
// Intel recommends to reuse registers as soon as they're overwritable (DO NOT SPILL)
|
||||
} else if (loc_info.IsEmpty()) {
|
||||
it_empty_candidate = i;
|
||||
break;
|
||||
// No empty registers for some reason (very evil) - just do normal LRU
|
||||
} else if (loc_info.lru_counter < min_lru_counter) {
|
||||
// Otherwise a "quasi"-LRU
|
||||
min_lru_counter = loc_info.lru_counter;
|
||||
if (i >= HostLoc::R8 && i <= HostLoc::R15) {
|
||||
it_rex_candidate = i;
|
||||
} else {
|
||||
it_candidate = i;
|
||||
}
|
||||
// There used to be a break here - DO NOT BREAK away you MUST
|
||||
// evaluate ALL of the registers BEFORE making a decision on when to take
|
||||
// otherwise reg pressure will get high and bugs will seep :)
|
||||
// TODO(lizzie): Investigate these god awful annoying reg pressure issues
|
||||
}
|
||||
// There used to be a break here - DO NOT BREAK away you MUST
|
||||
// evaluate ALL of the registers BEFORE making a decision on when to take
|
||||
// otherwise reg pressure will get high and bugs will seep :)
|
||||
// TODO(lizzie): Investigate these god awful annoying reg pressure issues
|
||||
}
|
||||
}
|
||||
// Final resolution goes as follows:
|
||||
|
|
@ -445,13 +445,13 @@ HostLoc RegAlloc::SelectARegister(const boost::container::static_vector<HostLoc,
|
|||
// 3 => Try using a REX prefixed one
|
||||
// We avoid using REX-addressable registers because they add +1 REX prefix which
|
||||
// do we really need? The trade-off may not be worth it.
|
||||
auto const it_final = it_empty_candidate != desired_locations.cend()
|
||||
? it_empty_candidate : it_candidate != desired_locations.cend()
|
||||
auto const it_final = it_empty_candidate != HostLoc::FirstSpill
|
||||
? it_empty_candidate : it_candidate != HostLoc::FirstSpill
|
||||
? it_candidate : it_rex_candidate;
|
||||
ASSERT(it_final != desired_locations.cend() && "All candidate registers have already been allocated");
|
||||
ASSERT(it_final != HostLoc::FirstSpill && "All candidate registers have already been allocated");
|
||||
// Evil magic - increment LRU counter (will wrap at 256)
|
||||
const_cast<RegAlloc*>(this)->LocInfo(*it_final).lru_counter++;
|
||||
return *it_final;
|
||||
const_cast<RegAlloc*>(this)->LocInfo(HostLoc(it_final)).lru_counter++;
|
||||
return HostLoc(it_final);
|
||||
}
|
||||
|
||||
std::optional<HostLoc> RegAlloc::ValueLocation(const IR::Inst* value) const noexcept {
|
||||
|
|
|
|||
|
|
@ -139,7 +139,7 @@ class RegAlloc final {
|
|||
public:
|
||||
using ArgumentInfo = std::array<Argument, IR::max_arg_count>;
|
||||
RegAlloc() noexcept = default;
|
||||
RegAlloc(boost::container::static_vector<HostLoc, 28> gpr_order, boost::container::static_vector<HostLoc, 28> xmm_order) noexcept;
|
||||
RegAlloc(std::bitset<32> gpr_order, std::bitset<32> xmm_order) noexcept;
|
||||
|
||||
ArgumentInfo GetArgumentInfo(const IR::Inst* inst) noexcept;
|
||||
void RegisterPseudoOperation(const IR::Inst* inst) noexcept;
|
||||
|
|
@ -162,7 +162,7 @@ public:
|
|||
inline void Use(BlockOfCode& code, Argument& arg, const HostLoc host_loc) noexcept {
|
||||
ASSERT(!arg.allocated);
|
||||
arg.allocated = true;
|
||||
UseImpl(code, arg.value, {host_loc});
|
||||
UseImpl(code, arg.value, BuildRegSet({host_loc}));
|
||||
}
|
||||
|
||||
Xbyak::Reg64 UseScratchGpr(BlockOfCode& code, Argument& arg) noexcept;
|
||||
|
|
@ -178,13 +178,13 @@ public:
|
|||
return HostLocToReg64(ScratchImpl(code, gpr_order));
|
||||
}
|
||||
inline Xbyak::Reg64 ScratchGpr(BlockOfCode& code, const HostLoc desired_location) noexcept {
|
||||
return HostLocToReg64(ScratchImpl(code, {desired_location}));
|
||||
return HostLocToReg64(ScratchImpl(code, BuildRegSet({desired_location})));
|
||||
}
|
||||
inline Xbyak::Xmm ScratchXmm(BlockOfCode& code) noexcept {
|
||||
return HostLocToXmm(ScratchImpl(code, xmm_order));
|
||||
}
|
||||
inline Xbyak::Xmm ScratchXmm(BlockOfCode& code, HostLoc desired_location) noexcept {
|
||||
return HostLocToXmm(ScratchImpl(code, {desired_location}));
|
||||
return HostLocToXmm(ScratchImpl(code, BuildRegSet({desired_location})));
|
||||
}
|
||||
|
||||
void HostCall(
|
||||
|
|
@ -216,11 +216,11 @@ public:
|
|||
private:
|
||||
friend struct Argument;
|
||||
|
||||
HostLoc SelectARegister(const boost::container::static_vector<HostLoc, 28>& desired_locations) const noexcept;
|
||||
HostLoc SelectARegister(std::bitset<32> desired_locations) const noexcept;
|
||||
std::optional<HostLoc> ValueLocation(const IR::Inst* value) const noexcept;
|
||||
HostLoc UseImpl(BlockOfCode& code, IR::Value use_value, const boost::container::static_vector<HostLoc, 28>& desired_locations) noexcept;
|
||||
HostLoc UseScratchImpl(BlockOfCode& code, IR::Value use_value, const boost::container::static_vector<HostLoc, 28>& desired_locations) noexcept;
|
||||
HostLoc ScratchImpl(BlockOfCode& code, const boost::container::static_vector<HostLoc, 28>& desired_locations) noexcept;
|
||||
HostLoc UseImpl(BlockOfCode& code, IR::Value use_value, std::bitset<32> desired_locations) noexcept;
|
||||
HostLoc UseScratchImpl(BlockOfCode& code, IR::Value use_value, std::bitset<32> desired_locations) noexcept;
|
||||
HostLoc ScratchImpl(BlockOfCode& code, std::bitset<32> desired_locations) noexcept;
|
||||
void DefineValueImpl(BlockOfCode& code, IR::Inst* def_inst, HostLoc host_loc) noexcept;
|
||||
void DefineValueImpl(BlockOfCode& code, IR::Inst* def_inst, const IR::Value& use_inst) noexcept;
|
||||
|
||||
|
|
@ -246,12 +246,10 @@ private:
|
|||
void EmitExchange(BlockOfCode& code, const HostLoc a, const HostLoc b) noexcept;
|
||||
|
||||
//data
|
||||
alignas(64) boost::container::static_vector<HostLoc, 28> gpr_order;
|
||||
alignas(64) boost::container::static_vector<HostLoc, 28> xmm_order;
|
||||
alignas(64) std::array<HostLocInfo, NonSpillHostLocCount + SpillCount> hostloc_info;
|
||||
std::bitset<32> gpr_order;
|
||||
std::bitset<32> xmm_order;
|
||||
size_t reserved_stack_space = 0;
|
||||
};
|
||||
// Ensure a cache line (or less) is used, this is primordial
|
||||
static_assert(sizeof(boost::container::static_vector<HostLoc, 28>) < 64);
|
||||
|
||||
} // namespace Dynarmic::Backend::X64
|
||||
|
|
|
|||
Loading…
Reference in New Issue