From 9f0d4b21ec343dc85cb2134404fedfe7c3bfd6eb Mon Sep 17 00:00:00 2001 From: lizzie Date: Sat, 14 Feb 2026 10:01:40 +0000 Subject: [PATCH] [dynarmic] Transition IR::Block to use stable_vector, remove inline pool + pooled vector Signed-off-by: lizzie --- .../src/dynarmic/backend/arm64/emit_arm64.cpp | 4 +- .../dynarmic/backend/riscv64/emit_riscv64.cpp | 2 +- .../src/dynarmic/backend/x64/a32_emit_x64.cpp | 4 +- .../src/dynarmic/backend/x64/a64_emit_x64.cpp | 2 +- .../A32/translate/conditional_state.cpp | 4 +- .../frontend/A32/translate/translate_arm.cpp | 4 +- .../A32/translate/translate_thumb.cpp | 4 +- .../frontend/A64/translate/a64_translate.cpp | 4 +- .../frontend/A64/translate/impl/system.cpp | 2 +- src/dynarmic/src/dynarmic/ir/basic_block.cpp | 32 ++++--------- src/dynarmic/src/dynarmic/ir/basic_block.h | 47 ++----------------- src/dynarmic/src/dynarmic/ir/ir_emitter.h | 17 +++---- .../src/dynarmic/ir/microinstruction.h | 6 +-- src/dynarmic/src/dynarmic/ir/opt_passes.cpp | 31 ++++++------ 14 files changed, 53 insertions(+), 110 deletions(-) diff --git a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64.cpp b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64.cpp index 104d0a452c..e4958eb67f 100644 --- a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64.cpp +++ b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64.cpp @@ -212,7 +212,7 @@ EmittedBlockInfo EmitArm64(oaknut::CodeGenerator& code, IR::Block block, const E oaknut::Label pass; pass = conf.emit_cond(code, ctx, ctx.block.GetCondition()); - EmitAddCycles(code, ctx, ctx.block.ConditionFailedCycleCount()); + EmitAddCycles(code, ctx, ctx.block.cond_failed_cycle_count); conf.emit_condition_failed_terminal(code, ctx); code.l(pass); @@ -254,7 +254,7 @@ EmittedBlockInfo EmitArm64(oaknut::CodeGenerator& code, IR::Block block, const E reg_alloc.AssertNoMoreUses(); - EmitAddCycles(code, ctx, block.CycleCount()); + EmitAddCycles(code, ctx, block.cycle_count); conf.emit_terminal(code, ctx); code.BRK(0); diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64.cpp index 50cbaf9526..32a26de781 100644 --- a/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64.cpp +++ b/src/dynarmic/src/dynarmic/backend/riscv64/emit_riscv64.cpp @@ -151,7 +151,7 @@ EmittedBlockInfo EmitRV64(biscuit::Assembler& as, IR::Block block, const EmitCon reg_alloc.AssertNoMoreUses(); if (emit_conf.enable_cycle_counting) { - const size_t cycles_to_add = block.CycleCount(); + const size_t cycles_to_add = block.cycle_count; as.LD(Xscratch0, offsetof(StackLayout, cycles_remaining), sp); if (mcl::bit::sign_extend<12>(-cycles_to_add) == -cycles_to_add) { as.ADDI(Xscratch0, Xscratch0, -cycles_to_add); diff --git a/src/dynarmic/src/dynarmic/backend/x64/a32_emit_x64.cpp b/src/dynarmic/src/dynarmic/backend/x64/a32_emit_x64.cpp index a4c62e129b..611d994f51 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/a32_emit_x64.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/a32_emit_x64.cpp @@ -153,7 +153,7 @@ A32EmitX64::BlockDescriptor A32EmitX64::Emit(IR::Block& block) { reg_alloc.AssertNoMoreUses(); if (conf.enable_cycle_counting) { - EmitAddCycles(block.CycleCount()); + EmitAddCycles(block.cycle_count); } EmitTerminal(block.GetTerminal(), ctx.Location().SetSingleStepping(false), ctx.IsSingleStep()); code.int3(); @@ -197,7 +197,7 @@ void A32EmitX64::EmitCondPrelude(const A32EmitContext& ctx) { Xbyak::Label pass = EmitCond(ctx.block.GetCondition()); if (conf.enable_cycle_counting) { - EmitAddCycles(ctx.block.ConditionFailedCycleCount()); + EmitAddCycles(ctx.block.cond_failed_cycle_count); } EmitTerminal(IR::Term::LinkBlock{ctx.block.ConditionFailedLocation()}, ctx.Location().SetSingleStepping(false), ctx.IsSingleStep()); code.L(pass); diff --git a/src/dynarmic/src/dynarmic/backend/x64/a64_emit_x64.cpp b/src/dynarmic/src/dynarmic/backend/x64/a64_emit_x64.cpp index 03d0e13562..75a48bcc90 100644 --- a/src/dynarmic/src/dynarmic/backend/x64/a64_emit_x64.cpp +++ b/src/dynarmic/src/dynarmic/backend/x64/a64_emit_x64.cpp @@ -146,7 +146,7 @@ finish_this_inst: reg_alloc.AssertNoMoreUses(); if (conf.enable_cycle_counting) { - EmitAddCycles(block.CycleCount()); + EmitAddCycles(block.cycle_count); } EmitTerminal(block.GetTerminal(), ctx.Location().SetSingleStepping(false), ctx.IsSingleStep()); code.int3(); diff --git a/src/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.cpp b/src/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.cpp index 8c55588a28..6f6d2d7b68 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.cpp +++ b/src/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.cpp @@ -48,7 +48,7 @@ bool IsConditionPassed(TranslatorVisitor& v, IR::Cond cond) { } else { if (cond == v.ir.block.GetCondition()) { v.ir.block.SetConditionFailedLocation(v.ir.current_location.AdvancePC(static_cast(v.current_instruction_size)).AdvanceIT()); - v.ir.block.ConditionFailedCycleCount()++; + v.ir.block.cond_failed_cycle_count++; return true; } @@ -79,7 +79,7 @@ bool IsConditionPassed(TranslatorVisitor& v, IR::Cond cond) { v.cond_state = ConditionalState::Translating; v.ir.block.SetCondition(cond); v.ir.block.SetConditionFailedLocation(v.ir.current_location.AdvancePC(static_cast(v.current_instruction_size)).AdvanceIT()); - v.ir.block.ConditionFailedCycleCount() = v.ir.block.CycleCount() + 1; + v.ir.block.cond_failed_cycle_count = v.ir.block.cycle_count + 1; return true; } diff --git a/src/dynarmic/src/dynarmic/frontend/A32/translate/translate_arm.cpp b/src/dynarmic/src/dynarmic/frontend/A32/translate/translate_arm.cpp index 5cc9ef3893..320046ffc1 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/translate/translate_arm.cpp +++ b/src/dynarmic/src/dynarmic/frontend/A32/translate/translate_arm.cpp @@ -61,7 +61,7 @@ void TranslateArm(IR::Block& block, LocationDescriptor descriptor, TranslateCall } visitor.ir.current_location = visitor.ir.current_location.AdvancePC(4); - block.CycleCount() += ticks_for_instruction; + block.cycle_count += ticks_for_instruction; } while (should_continue && CondCanContinue(visitor.cond_state, visitor.ir) && !single_step); if (visitor.cond_state == ConditionalState::Translating || visitor.cond_state == ConditionalState::Trailing || single_step) { @@ -101,7 +101,7 @@ bool TranslateSingleArmInstruction(IR::Block& block, LocationDescriptor descript // TODO: Feedback resulting cond status to caller somehow. visitor.ir.current_location = visitor.ir.current_location.AdvancePC(4); - block.CycleCount() += ticks_for_instruction; + block.cycle_count += ticks_for_instruction; block.SetEndLocation(visitor.ir.current_location); diff --git a/src/dynarmic/src/dynarmic/frontend/A32/translate/translate_thumb.cpp b/src/dynarmic/src/dynarmic/frontend/A32/translate/translate_thumb.cpp index e0333e487d..a043c3f543 100644 --- a/src/dynarmic/src/dynarmic/frontend/A32/translate/translate_thumb.cpp +++ b/src/dynarmic/src/dynarmic/frontend/A32/translate/translate_thumb.cpp @@ -161,7 +161,7 @@ void TranslateThumb(IR::Block& block, LocationDescriptor descriptor, TranslateCa } visitor.ir.current_location = visitor.ir.current_location.AdvancePC(static_cast(visitor.current_instruction_size)).AdvanceIT(); - block.CycleCount() += ticks_for_instruction; + block.cycle_count += ticks_for_instruction; } while (should_continue && CondCanContinue(visitor.cond_state, visitor.ir) && !single_step); if (visitor.cond_state == ConditionalState::Translating || visitor.cond_state == ConditionalState::Trailing || single_step) { @@ -214,7 +214,7 @@ bool TranslateSingleThumbInstruction(IR::Block& block, LocationDescriptor descri const s32 advance_pc = is_thumb_16 ? 2 : 4; visitor.ir.current_location = visitor.ir.current_location.AdvancePC(advance_pc); - block.CycleCount() += ticks_for_instruction; + block.cycle_count += ticks_for_instruction; block.SetEndLocation(visitor.ir.current_location); diff --git a/src/dynarmic/src/dynarmic/frontend/A64/translate/a64_translate.cpp b/src/dynarmic/src/dynarmic/frontend/A64/translate/a64_translate.cpp index e8d815518c..948c2a2aae 100644 --- a/src/dynarmic/src/dynarmic/frontend/A64/translate/a64_translate.cpp +++ b/src/dynarmic/src/dynarmic/frontend/A64/translate/a64_translate.cpp @@ -35,7 +35,7 @@ void Translate(IR::Block& block, LocationDescriptor descriptor, MemoryReadCodeFu } visitor.ir.current_location = visitor.ir.current_location->AdvancePC(4); - block.CycleCount()++; + block.cycle_count++; } while (should_continue && !single_step); if (single_step && should_continue) { @@ -56,7 +56,7 @@ bool TranslateSingleInstruction(IR::Block& block, LocationDescriptor descriptor, } visitor.ir.current_location = visitor.ir.current_location->AdvancePC(4); - block.CycleCount()++; + block.cycle_count++; block.SetEndLocation(*visitor.ir.current_location); diff --git a/src/dynarmic/src/dynarmic/frontend/A64/translate/impl/system.cpp b/src/dynarmic/src/dynarmic/frontend/A64/translate/impl/system.cpp index 7c4b8a1ac6..3020901586 100644 --- a/src/dynarmic/src/dynarmic/frontend/A64/translate/impl/system.cpp +++ b/src/dynarmic/src/dynarmic/frontend/A64/translate/impl/system.cpp @@ -130,7 +130,7 @@ bool TranslatorVisitor::MRS(Imm<1> o0, Imm<3> op1, Imm<4> CRn, Imm<4> CRm, Imm<3 case SystemRegisterEncoding::CNTPCT_EL0: // HACK: Ensure that this is the first instruction in the block it's emitted in, so the cycle count is most up-to-date. if (!ir.block.instructions.empty() && !options.wall_clock_cntpct) { - ir.block.CycleCount()--; + ir.block.cycle_count--; ir.SetTerm(IR::Term::LinkBlock{*ir.current_location}); return false; } diff --git a/src/dynarmic/src/dynarmic/ir/basic_block.cpp b/src/dynarmic/src/dynarmic/ir/basic_block.cpp index d210bafd35..28297623e3 100644 --- a/src/dynarmic/src/dynarmic/ir/basic_block.cpp +++ b/src/dynarmic/src/dynarmic/ir/basic_block.cpp @@ -30,38 +30,26 @@ Block::Block(LocationDescriptor location) noexcept /// Prepends a new instruction to this basic block before the insertion point, /// handling any allocations necessary to do so. /// @param insertion_point Where to insert the new instruction. -/// @param op Opcode representing the instruction to add. -/// @param args A sequence of Value instances used as arguments for the instruction. +/// @param op Opcode representing the instruction to add. +/// @param args A sequence of Value instances used as arguments for the instruction. /// @returns Iterator to the newly created instruction. -Block::iterator Block::PrependNewInst(iterator insertion_point, Opcode opcode, std::initializer_list args) noexcept { +Block::iterator Block::PrependNewInst(Block::const_iterator insertion_point, Opcode opcode, std::initializer_list args) noexcept { // First try using the "inline" buffer, otherwise fallback to a slower slab-like allocation scheme // purpouse is to avoid many calls to new/delete which invoke malloc which invokes mmap // just pool it!!! - reason why there is an inline buffer is because many small blocks are created // with few instructions due to subpar optimisations on other passes... plus branch-heavy code will // hugely benefit from the coherency of faster allocations... - IR::Inst* inst; - if (inlined_inst.size() < inlined_inst.max_size()) { - inlined_inst.emplace_back(opcode); - inst = &inlined_inst[inlined_inst.size() - 1]; - } else { - if (pooled_inst.empty() || pooled_inst.back().size() == pooled_inst.back().max_size()) - pooled_inst.emplace_back(); - pooled_inst.back().emplace_back(opcode); - inst = &pooled_inst.back()[pooled_inst.back().size() - 1]; - } - DEBUG_ASSERT(args.size() == inst->NumArgs()); - std::for_each(args.begin(), args.end(), [&inst, index = size_t(0)](const auto& arg) mutable { - inst->SetArg(index, arg); + auto it = instructions.insert(insertion_point, Inst(opcode)); + DEBUG_ASSERT(args.size() == it->NumArgs()); + std::for_each(args.begin(), args.end(), [&it, index = size_t(0)](const auto& arg) mutable { + it->SetArg(index, arg); index++; }); - return instructions.insert_before(insertion_point, inst); + return it; } void Block::Reset(LocationDescriptor location_) noexcept { - mcl::intrusive_list tmp = {}; - instructions.swap(tmp); - inlined_inst.clear(); - pooled_inst.clear(); + instructions.clear(); cond_failed.reset(); location = location_; end_location = location_; @@ -110,7 +98,7 @@ static std::string TerminalToString(const Terminal& terminal_variant) noexcept { std::string DumpBlock(const IR::Block& block) noexcept { std::string ret = fmt::format("Block: location={}-{}\n", block.Location(), block.EndLocation()) - + fmt::format("cycles={}", block.CycleCount()) + + fmt::format("cycles={}", block.cycle_count) + fmt::format(", entry_cond={}", A64::CondToString(block.GetCondition())); if (block.GetCondition() != Cond::AL) ret += fmt::format(", cond_fail={}", block.ConditionFailedLocation()); diff --git a/src/dynarmic/src/dynarmic/ir/basic_block.h b/src/dynarmic/src/dynarmic/ir/basic_block.h index 4044005bd0..db9ac7bd12 100644 --- a/src/dynarmic/src/dynarmic/ir/basic_block.h +++ b/src/dynarmic/src/dynarmic/ir/basic_block.h @@ -16,7 +16,6 @@ #include #include #include -#include #include "dynarmic/common/common_types.h" #include "dynarmic/ir/location_descriptor.h" @@ -33,10 +32,10 @@ enum class Opcode; /// Note that this is a linear IR and not a pure tree-based IR: i.e.: there is an ordering to /// the microinstructions. This only matters before chaining is done in order to correctly /// order memory accesses. -class alignas(4096) Block final { +class Block final { public: //using instruction_list_type = dense_list; - using instruction_list_type = mcl::intrusive_list; + using instruction_list_type = boost::container::stable_vector; using size_type = instruction_list_type::size_type; using iterator = instruction_list_type::iterator; using const_iterator = instruction_list_type::const_iterator; @@ -50,25 +49,9 @@ public: Block(Block&&) = default; Block& operator=(Block&&) = default; - /// Appends a new instruction to the end of this basic block, - /// handling any allocations necessary to do so. - /// @param op Opcode representing the instruction to add. - /// @param args A sequence of Value instances used as arguments for the instruction. - inline iterator AppendNewInst(const Opcode opcode, const std::initializer_list args) noexcept { - return PrependNewInst(instructions.end(), opcode, args); - } - iterator PrependNewInst(iterator insertion_point, Opcode op, std::initializer_list args) noexcept; + iterator PrependNewInst(const_iterator insertion_point, Opcode op, std::initializer_list args) noexcept; void Reset(LocationDescriptor location_) noexcept; - /// Gets a mutable reference to the instruction list for this basic block. - inline instruction_list_type& Instructions() noexcept { - return instructions; - } - /// Gets an immutable reference to the instruction list for this basic block. - inline const instruction_list_type& Instructions() const noexcept { - return instructions; - } - /// Gets the starting location for this basic block. inline LocationDescriptor Location() const noexcept { return location; @@ -104,15 +87,6 @@ public: return cond_failed.has_value(); } - /// Gets a mutable reference to the condition failed cycle count. - inline size_t& ConditionFailedCycleCount() noexcept { - return cond_failed_cycle_count; - } - /// Gets an immutable reference to the condition failed cycle count. - inline const size_t& ConditionFailedCycleCount() const noexcept { - return cond_failed_cycle_count; - } - /// Gets the terminal instruction for this basic block. inline Terminal GetTerminal() const noexcept { return terminal; @@ -132,21 +106,8 @@ public: return terminal.which() != 0; } - /// Gets a mutable reference to the cycle count for this basic block. - inline size_t& CycleCount() noexcept { - return cycle_count; - } - /// Gets an immutable reference to the cycle count for this basic block. - inline const size_t& CycleCount() const noexcept { - return cycle_count; - } - - /// "Hot cache" for small blocks so we don't call global allocator - boost::container::static_vector inlined_inst; /// List of instructions in this block. instruction_list_type instructions; - /// "Long/far" memory pool - boost::container::stable_vector> pooled_inst; /// Block to execute next if `cond` did not pass. std::optional cond_failed = {}; /// Description of the starting location of this block @@ -162,7 +123,7 @@ public: /// Number of cycles this block takes to execute. size_t cycle_count = 0; }; -static_assert(sizeof(Block) == 4096); +//static_assert(sizeof(Block) == 120); /// Returns a string representation of the contents of block. Intended for debugging. std::string DumpBlock(const IR::Block& block) noexcept; diff --git a/src/dynarmic/src/dynarmic/ir/ir_emitter.h b/src/dynarmic/src/dynarmic/ir/ir_emitter.h index 2b5c7d5cdd..becbbf92c7 100644 --- a/src/dynarmic/src/dynarmic/ir/ir_emitter.h +++ b/src/dynarmic/src/dynarmic/ir/ir_emitter.h @@ -70,7 +70,10 @@ enum class MemOp { /// The user of this class updates `current_location` as appropriate. class IREmitter { public: - explicit IREmitter(Block& block) : block(block), insertion_point(block.instructions.end()) {} + explicit IREmitter(Block& block) noexcept + : block(block) + , insertion_point(block.instructions.end()) + {} Block& block; @@ -2947,19 +2950,10 @@ public: block.SetTerminal(terminal); } - void SetInsertionPointBefore(IR::Inst* new_insertion_point) { - insertion_point = IR::Block::iterator{*new_insertion_point}; - } - void SetInsertionPointBefore(IR::Block::iterator new_insertion_point) { insertion_point = new_insertion_point; } - void SetInsertionPointAfter(IR::Inst* new_insertion_point) { - insertion_point = IR::Block::iterator{*new_insertion_point}; - ++insertion_point; - } - void SetInsertionPointAfter(IR::Block::iterator new_insertion_point) { insertion_point = new_insertion_point; ++insertion_point; @@ -2970,7 +2964,10 @@ protected: template T Inst(Opcode op, Args... args) { + auto const offset = std::distance(block.instructions.begin(), insertion_point); + auto const at_end = block.instructions.end() == insertion_point; auto iter = block.PrependNewInst(insertion_point, op, {Value(args)...}); + insertion_point = at_end ? block.instructions.end() : block.instructions.begin() + (offset + 1); return T(Value(&*iter)); } }; diff --git a/src/dynarmic/src/dynarmic/ir/microinstruction.h b/src/dynarmic/src/dynarmic/ir/microinstruction.h index 843b4cdf18..d1fea62e04 100644 --- a/src/dynarmic/src/dynarmic/ir/microinstruction.h +++ b/src/dynarmic/src/dynarmic/ir/microinstruction.h @@ -1,4 +1,4 @@ -// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project +// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project // SPDX-License-Identifier: GPL-3.0-or-later /* This file is part of the dynarmic project. @@ -10,9 +10,7 @@ #include -#include #include "dynarmic/common/common_types.h" - #include "dynarmic/ir/value.h" #include "dynarmic/ir/opcodes.h" @@ -26,7 +24,7 @@ constexpr size_t max_arg_count = 4; /// A representation of a microinstruction. A single ARM/Thumb instruction may be /// converted into zero or more microinstructions. //class Inst final { -class Inst final : public mcl::intrusive_list_node { +class Inst final { public: explicit Inst(Opcode op) : op(op) {} diff --git a/src/dynarmic/src/dynarmic/ir/opt_passes.cpp b/src/dynarmic/src/dynarmic/ir/opt_passes.cpp index ee68a0bcfc..e40949eeee 100644 --- a/src/dynarmic/src/dynarmic/ir/opt_passes.cpp +++ b/src/dynarmic/src/dynarmic/ir/opt_passes.cpp @@ -86,12 +86,10 @@ static void ConstantMemoryReads(IR::Block& block, A32::UserCallbacks* cb) { } static void FlagsPass(IR::Block& block) { - using Iterator = typename std::reverse_iterator; - struct FlagInfo { bool set_not_required = false; bool has_value_request = false; - Iterator value_request = {}; + IR::Block::reverse_iterator value_request = {}; }; struct ValuelessFlagInfo { bool set_not_required = false; @@ -102,7 +100,7 @@ static void FlagsPass(IR::Block& block) { FlagInfo c_flag; FlagInfo ge; - auto do_set = [&](FlagInfo& info, IR::Value value, Iterator inst) { + auto do_set = [&](FlagInfo& info, IR::Value value, IR::Block::reverse_iterator inst) { if (info.has_value_request) { info.value_request->ReplaceUsesWith(value); } @@ -114,14 +112,14 @@ static void FlagsPass(IR::Block& block) { info.set_not_required = true; }; - auto do_set_valueless = [&](ValuelessFlagInfo& info, Iterator inst) { + auto do_set_valueless = [](ValuelessFlagInfo& info, IR::Block::reverse_iterator inst) { if (info.set_not_required) { inst->Invalidate(); } info.set_not_required = true; }; - auto do_get = [](FlagInfo& info, Iterator inst) { + auto do_get = [](FlagInfo& info, IR::Block::reverse_iterator inst) { if (info.has_value_request) { info.value_request->ReplaceUsesWith(IR::Value{&*inst}); } @@ -448,7 +446,8 @@ static void A64CallbackConfigPass(IR::Block& block, const A64::UserConfig& conf) return; } - for (auto& inst : block.instructions) { + for (auto it = block.instructions.begin(); it != block.instructions.end(); it++) { + auto& inst = *it; if (inst.GetOpcode() != IR::Opcode::A64DataCacheOperationRaised) { continue; } @@ -457,7 +456,7 @@ static void A64CallbackConfigPass(IR::Block& block, const A64::UserConfig& conf) if (op == A64::DataCacheOperation::ZeroByVA) { A64::IREmitter ir{block}; ir.current_location = A64::LocationDescriptor{IR::LocationDescriptor{inst.GetArg(0).GetU64()}}; - ir.SetInsertionPointBefore(&inst); + ir.SetInsertionPointBefore(it); size_t bytes = 4 << static_cast(conf.dczid_el0 & 0b1111); IR::U64 addr{inst.GetArg(2)}; @@ -522,7 +521,7 @@ static void A64GetSetElimination(IR::Block& block) { const auto do_set = [&block](RegisterInfo& info, IR::Value value, Iterator set_inst, TrackingType tracking_type) { if (info.set_instruction_present) { info.last_set_instruction->Invalidate(); - block.Instructions().erase(info.last_set_instruction); + block.instructions.erase(info.last_set_instruction); } info.register_value = value; info.tracking_type = tracking_type; @@ -541,7 +540,7 @@ static void A64GetSetElimination(IR::Block& block) { ReplaceUsesWith(*get_inst, true, u32(info.register_value.GetImmediateAsU64())); } else { A64::IREmitter ir{block}; - ir.SetInsertionPointBefore(&*get_inst); + ir.SetInsertionPointBefore(get_inst); get_inst->ReplaceUsesWith(ir.LeastSignificantWord(IR::U64{info.register_value})); } } else { @@ -647,7 +646,7 @@ static void A64MergeInterpretBlocksPass(IR::Block& block, A64::UserCallbacks* cb IR::Block new_block{location}; A64::TranslateSingleInstruction(new_block, location, *instruction); - if (!new_block.Instructions().empty()) + if (!new_block.instructions.empty()) return false; const IR::Terminal terminal = new_block.GetTerminal(); @@ -672,7 +671,7 @@ static void A64MergeInterpretBlocksPass(IR::Block& block, A64::UserCallbacks* cb term->num_instructions = num_instructions; block.ReplaceTerminal(terminal); - block.CycleCount() += num_instructions - 1; + block.cycle_count += num_instructions - 1; } using Op = Dynarmic::IR::Opcode; @@ -1241,7 +1240,7 @@ static void IdentityRemovalPass(IR::Block& block) { } if (it->GetOpcode() == IR::Opcode::Identity || it->GetOpcode() == IR::Opcode::Void) { to_invalidate.push_back(&*it); - it = block.Instructions().erase(it); + it = block.instructions.erase(it); } else { ++it; } @@ -1401,9 +1400,9 @@ static void PolyfillPass(IR::Block& block, const PolyfillOptions& polyfill) { IR::IREmitter ir{block}; - for (auto& inst : block.instructions) { - ir.SetInsertionPointBefore(&inst); - + for (auto it = block.instructions.begin(); it != block.instructions.end(); it++) { + auto& inst = *it; + ir.SetInsertionPointBefore(it); switch (inst.GetOpcode()) { case IR::Opcode::SHA256MessageSchedule0: if (polyfill.sha256) {