diff --git a/src/dynarmic/tests/A32/fuzz_arm.cpp b/src/dynarmic/tests/A32/fuzz_arm.cpp
index b3f388a938..087ce54813 100644
--- a/src/dynarmic/tests/A32/fuzz_arm.cpp
+++ b/src/dynarmic/tests/A32/fuzz_arm.cpp
@@ -357,7 +357,7 @@ static void RunTestInstance(Dynarmic::A32::Jit& jit,
uni.ClearPageCache();
jit_env.ticks_left = ticks_left;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
uni_env.ticks_left = instructions.size(); // Unicorn counts thumb instructions weirdly.
uni.Run();
diff --git a/src/dynarmic/tests/A32/fuzz_thumb.cpp b/src/dynarmic/tests/A32/fuzz_thumb.cpp
index dfd5672772..4d14141bbf 100644
--- a/src/dynarmic/tests/A32/fuzz_thumb.cpp
+++ b/src/dynarmic/tests/A32/fuzz_thumb.cpp
@@ -130,7 +130,7 @@ static void RunInstance(size_t run_number, ThumbTestEnv& test_env, A32Unicorn
expected = {0x954d53b0, 0x4caaad40, 0xb0afaead, 0x0da0cdb6, 0x0f43507e, 0xb4b3b2b1, 0x00000066, 0x892a6888,
0x3b9ffb23, 0x0a92ef93, 0x38dee619, 0xc0e95e81, 0x6a448690, 0xc2d4d6b9, 0xe93600b9, 0x0000000a};
diff --git a/src/dynarmic/tests/A32/testenv.h b/src/dynarmic/tests/A32/testenv.h
index b196c5e568..a6df2017ce 100644
--- a/src/dynarmic/tests/A32/testenv.h
+++ b/src/dynarmic/tests/A32/testenv.h
@@ -16,8 +16,8 @@
#include "dynarmic/common/assert.h"
#include "dynarmic/common/common_types.h"
-
#include "dynarmic/interface/A32/a32.h"
+#include "../native/testenv.h"
template
class A32TestEnv : public Dynarmic::A32::UserCallbacks {
diff --git a/src/dynarmic/tests/A64/a64.cpp b/src/dynarmic/tests/A64/a64.cpp
index fefb8a32a2..40eff1f071 100644
--- a/src/dynarmic/tests/A64/a64.cpp
+++ b/src/dynarmic/tests/A64/a64.cpp
@@ -28,7 +28,7 @@ TEST_CASE("A64: ADD", "[a64]") {
jit.SetPC(0);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 3);
REQUIRE(jit.GetRegister(1) == 1);
@@ -54,7 +54,7 @@ TEST_CASE("A64: ADD{V,P}", "[a64]") {
jit.SetPC(0);
env.ticks_left = 7;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(1) == Vector{0x0000000000000008, 0x0000000000000000});
REQUIRE(jit.GetVector(2) == Vector{0x0000000000000010, 0x0000000000000000});
@@ -80,7 +80,7 @@ TEST_CASE("A64: CLZ", "[a64]") {
jit.SetVector(1, {0xfffcfffdfffeffff, 0x000F000700030001});
jit.SetVector(2, {0xfffffffdfffffffe, 0x0000000300000001});
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(3) == Vector{0x0, 0x0001020304050607});
REQUIRE(jit.GetVector(4) == Vector{0x0, 0x000c000d000e000f});
@@ -105,7 +105,7 @@ TEST_CASE("A64: UADDL{V,P}", "[a64]") {
jit.SetPC(0);
env.ticks_left = 7;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(1) == Vector{0x00000000000007f8, 0x0000000000000000});
REQUIRE(jit.GetVector(2) == Vector{0x0000000000000ff0, 0x0000000000000000});
@@ -133,7 +133,7 @@ TEST_CASE("A64: SADDL{V,P}", "[a64]") {
jit.SetPC(0);
env.ticks_left = 7;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(1) == Vector{0x000000000000fff8, 0x0000000000000000});
REQUIRE(jit.GetVector(2) == Vector{0x000000000000fff0, 0x0000000000000000});
@@ -164,7 +164,7 @@ TEST_CASE("A64: VQADD", "[a64]") {
jit.SetPC(0);
env.ticks_left = 9;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(2) == Vector{0xff8fff7ffffe7f7f, 0xffffffffffffffff});
REQUIRE(jit.GetVector(3) == Vector{0xff7f7e7fff7f7f7f, 0xffffffffffffffff});
@@ -197,7 +197,7 @@ TEST_CASE("A64: VQSUB", "[a64]") {
jit.SetPC(0);
env.ticks_left = 9;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(2) == Vector{0x0100800001000000, 0x0100000001000100});
REQUIRE(jit.GetVector(3) == Vector{0x8091808180008181, 0x8001010180018001});
@@ -224,7 +224,7 @@ TEST_CASE("A64: REV", "[a64]") {
jit.SetPC(0);
env.ticks_left = 3;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 0x11ffeeddccbbaa);
REQUIRE(jit.GetRegister(1) == 0xddccbbaa);
@@ -244,7 +244,7 @@ TEST_CASE("A64: REV32", "[a64]") {
jit.SetPC(0);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 0xddccbbaa0011ffee);
REQUIRE(jit.GetPC() == 4);
}
@@ -265,7 +265,7 @@ TEST_CASE("A64: REV16", "[a64]") {
jit.SetPC(0);
env.ticks_left = 3;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 0xbbaaddccffee0011);
REQUIRE(jit.GetRegister(1) == 0xbbaaddcc);
REQUIRE(jit.GetPC() == 8);
@@ -298,7 +298,7 @@ TEST_CASE("A64: SSHL", "[a64]") {
jit.SetVector(17, {0x8000000000000000, 0xFFFFFFFFFFFFFFFF});
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
CHECK(jit.GetVector(4) == Vector{0xfffffefcf8f0e0c0, 0x0080e0f0f8fcfeff});
CHECK(jit.GetVector(5) == Vector{0xf800f000e000c000, 0xfff0fff8fffcfffe});
@@ -343,7 +343,7 @@ TEST_CASE("A64: USHL", "[a64]") {
jit.SetVector(17, {0x8000000000000000, 0x0000000000000001});
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
CHECK(jit.GetVector(4) == Vector{0x003f000000000000, 0x0080e0f0f8fcfeff});
CHECK(jit.GetVector(14) == Vector{0x0000000102040810});
@@ -379,7 +379,7 @@ TEST_CASE("A64: URSHL", "[a64]") {
jit.SetVector(11, Vector{0xffffffffffffffc1, 0x00555555555555f5});
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
CHECK(jit.GetVector(0) == Vector{0x00000001'53500000, 0x00000001'00000000});
CHECK(jit.GetVector(3) == Vector{0x00000001'00000002, 0x80000000'fffffffe});
@@ -405,7 +405,7 @@ TEST_CASE("A64: XTN", "[a64]") {
jit.SetVector(2, {0x0000000000000000, 0x1111111111111111});
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(3) == Vector{0x7766554433221100, 0x0000000000000000});
REQUIRE(jit.GetVector(4) == Vector{0x3333222211110000, 0x0000000000000000});
@@ -448,7 +448,7 @@ TEST_CASE("A64: TBL", "[a64]") {
jit.SetPC(0);
env.ticks_left = 9;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0) == Vector{0x001122334455'00'77, 0x0000000000000000});
REQUIRE(jit.GetVector(1) == Vector{0x001122334455'00'77, 0x8899aabbccddeeff});
@@ -496,7 +496,7 @@ TEST_CASE("A64: TBX", "[a64]") {
jit.SetPC(0);
env.ticks_left = 9;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0) == Vector{0x001122334455'FF'77, 0x0000000000000000});
REQUIRE(jit.GetVector(1) == Vector{0x001122334455'FF'77, 0x8899aabbccddeeff});
@@ -523,7 +523,7 @@ TEST_CASE("A64: AND", "[a64]") {
jit.SetPC(0);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 1);
REQUIRE(jit.GetRegister(1) == 1);
@@ -545,7 +545,7 @@ TEST_CASE("A64: Bitmasks", "[a64]") {
jit.SetPC(0);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 0x01010101);
REQUIRE(jit.GetRegister(1) == 0x00F000F0);
@@ -569,7 +569,7 @@ TEST_CASE("A64: ANDS NZCV", "[a64]") {
jit.SetPC(0);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 0xFFFFFFFF);
REQUIRE(jit.GetRegister(1) == 0xFFFFFFFF);
@@ -585,7 +585,7 @@ TEST_CASE("A64: ANDS NZCV", "[a64]") {
jit.SetPC(0);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 0x00000000);
REQUIRE(jit.GetRegister(1) == 0xFFFFFFFF);
@@ -600,7 +600,7 @@ TEST_CASE("A64: ANDS NZCV", "[a64]") {
jit.SetPC(0);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 0x12240010);
REQUIRE(jit.GetRegister(1) == 0x12345678);
@@ -627,7 +627,7 @@ TEST_CASE("A64: CBZ", "[a64]") {
jit.SetRegister(0, 1);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(2) == 1);
REQUIRE(jit.GetPC() == 8);
@@ -638,7 +638,7 @@ TEST_CASE("A64: CBZ", "[a64]") {
jit.SetRegister(0, 0);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(2) == 2);
REQUIRE(jit.GetPC() == 16);
@@ -662,7 +662,7 @@ TEST_CASE("A64: TBZ", "[a64]") {
jit.SetRegister(0, 0xFF);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(2) == 1);
REQUIRE(jit.GetPC() == 8);
@@ -673,7 +673,7 @@ TEST_CASE("A64: TBZ", "[a64]") {
jit.SetRegister(0, 0);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(2) == 2);
REQUIRE(jit.GetPC() == 16);
@@ -684,7 +684,7 @@ TEST_CASE("A64: TBZ", "[a64]") {
jit.SetRegister(0, 1);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(2) == 2);
REQUIRE(jit.GetPC() == 16);
@@ -705,7 +705,7 @@ TEST_CASE("A64: FABD", "[a64]") {
jit.SetVector(21, {0x56d3f085ff890e2b, 0x6e4b0a41801a2d00});
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(22) == Vector{0x56d3f0857fc90e2b, 0x6e4b0a4144873176});
}
@@ -727,7 +727,7 @@ TEST_CASE("A64: FABS", "[a64]") {
jit.SetVector(2, {0xffffffffffffffff, 0x8000000000000000});
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(4) == Vector{0x7fff7fff7fff7fff, 0x7fff7fff7fff0000});
REQUIRE(jit.GetVector(5) == Vector{0x7fbfffff7fc00000, 0x7f80000000000000});
@@ -752,7 +752,7 @@ TEST_CASE("A64: FMIN (example)", "[a64]") {
jit.SetVector(3, {0xbff0000000000000, 0x6e4b0a41ffffffff});
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0) == Vector{0x7fc00000'00000001, 0x00000000'7fd84a37});
REQUIRE(jit.GetVector(2) == Vector{0xbff0000000000000, 0x3ff0000000000000});
@@ -776,7 +776,7 @@ TEST_CASE("A64: FMAX (example)", "[a64]") {
jit.SetVector(3, {0xbff0000000000000, 0x6e4b0a41ffffffff});
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0) == Vector{0x7fc00000'09503366, 0x6e4b0a41'7fd84a37});
REQUIRE(jit.GetVector(2) == Vector{0x7fc0000009503366, 0x6e4b0a41ffffffff});
@@ -800,7 +800,7 @@ TEST_CASE("A64: FMINNM (example)", "[a64]") {
jit.SetVector(3, {0xfff0000000000000, 0xffffffffffffffff});
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0) == Vector{0xc1200000'00000001, 0x00000000'7fd84a37});
REQUIRE(jit.GetVector(2) == Vector{0xfff0000000000000, 0x3ff0000000000000});
@@ -824,7 +824,7 @@ TEST_CASE("A64: FMAXNM (example)", "[a64]") {
jit.SetVector(3, {0xfff0000000000000, 0xffffffffffffffff});
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0) == Vector{0xc1200000'09503366, 0x6e4b0a41'7fd84a37});
REQUIRE(jit.GetVector(2) == Vector{0x7fc0000009503366, 0x3ff0000000000000});
@@ -845,7 +845,7 @@ TEST_CASE("A64: FMAXNM (example 2)", "[a64]") {
jit.SetVector(27, {0xbc48d091'c79b271e, 0xff800001'3304c3ef});
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(29) == Vector{0xb485877c'42280000, 0xffc00001'3304c3ef});
}
@@ -875,7 +875,7 @@ TEST_CASE("A64: 128-bit exclusive read/write", "[a64]") {
jit.SetRegister(6, 0xd0d0cacad0d0caca);
env.ticks_left = 3;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(1) == 0x7f7e7d7c7b7a7978);
REQUIRE(jit.GetRegister(2) == 0x8786858483828180);
@@ -902,7 +902,7 @@ TEST_CASE("A64: CNTPCT_EL0", "[a64]") {
env.code_mem.emplace_back(0x14000000); // B .
env.ticks_left = 10;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(3) == 7);
}
@@ -922,7 +922,7 @@ TEST_CASE("A64: FNMSUB 1", "[a64]") {
jit.SetVector(2, {0x0000000000000000, 0xc79b271e3f000000});
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(28) == Vector{0x66ca513533ee6076, 0x0000000000000000});
}
@@ -943,7 +943,7 @@ TEST_CASE("A64: FNMSUB 2", "[a64]") {
jit.SetFpcr(0x00400000);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(14) == Vector{0x0000000080045284, 0x0000000000000000});
}
@@ -964,7 +964,7 @@ TEST_CASE("A64: FMADD", "[a64]") {
jit.SetFpcr(0x00400000);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(10) == Vector{0x3f059921bf0dbfff, 0x0000000000000000});
}
@@ -991,7 +991,7 @@ TEST_CASE("A64: FMLA.4S(lane)", "[a64]") {
jit.SetVector(15, {0x3ff00000'40000000, 0x40400000'40800000});
env.ticks_left = 5;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0) == Vector{0x40b4000040b40000, 0x4070000040700000});
REQUIRE(jit.GetVector(1) == Vector{0x40ac800040ac8000, 0x4061000040610000});
@@ -1016,7 +1016,7 @@ TEST_CASE("A64: FMUL.4S(lane)", "[a64]") {
jit.SetVector(15, {0x3ff00000'40000000, 0x40400000'40800000});
env.ticks_left = 5;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0) == Vector{0x4070000040700000, 0x4070000040700000});
REQUIRE(jit.GetVector(1) == Vector{0x4061000040610000, 0x4061000040610000});
@@ -1040,7 +1040,7 @@ TEST_CASE("A64: FMLA.4S (denormal)", "[a64]") {
jit.SetFpcr(0x01000000);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(12) == Vector{0x7ff800007fc00000, 0xbff0000068e8e581});
}
@@ -1061,7 +1061,7 @@ TEST_CASE("A64: FMLA.4S (0x80800000)", "[a64]") {
jit.SetFpcr(0x03000000);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(11) == Vector{0xc79b271e7fc00000, 0x7fc0000080000000});
}
@@ -1085,7 +1085,7 @@ TEST_CASE("A64: FMADD (0x80800000)", "[a64]") {
jit.SetFpcr(0x01000000);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(25) == Vector{0x80000000, 0});
}
@@ -1105,7 +1105,7 @@ TEST_CASE("A64: FNEG failed to zero upper", "[a64]") {
jit.SetFpcr(0x01000000);
env.ticks_left = 6;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(28) == Vector{0x79ee7a03980db670, 0});
REQUIRE(FP::FPSR{jit.GetFpsr()}.QC() == false);
@@ -1130,7 +1130,7 @@ TEST_CASE("A64: FRSQRTS", "[a64]") {
jit.SetFpcr(0x00400000);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(13) == Vector{0xff7fffff, 0});
}
@@ -1152,7 +1152,7 @@ TEST_CASE("A64: SQDMULH.8H (saturate)", "[a64]") {
jit.SetFpsr(0);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0) == Vector{0x7ffe7fff7ffc7ffe, 0x8001800180028002});
REQUIRE(FP::FPSR{jit.GetFpsr()}.QC() == true);
@@ -1175,7 +1175,7 @@ TEST_CASE("A64: SQDMULH.4S (saturate)", "[a64]") {
jit.SetFpsr(0);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0) == Vector{0x7ffffffe7fffffff, 0x8000000180000001});
REQUIRE(FP::FPSR{jit.GetFpsr()}.QC() == true);
@@ -1196,7 +1196,7 @@ TEST_CASE("A64: This is an infinite loop if fast dispatch is enabled", "[a64]")
env.code_mem.emplace_back(0x14000000); // B .
env.ticks_left = 6;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
}
TEST_CASE("A64: EXTR", "[a64]") {
@@ -1213,7 +1213,7 @@ TEST_CASE("A64: EXTR", "[a64]") {
jit.SetRegister(24, 1);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(23) == 0);
}
@@ -1248,7 +1248,7 @@ TEST_CASE("A64: Isolated GetNZCVFromOp", "[a64]") {
jit.SetPC(0);
env.ticks_left = 20;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
}
TEST_CASE("A64: Optimization failure when folding ADD", "[a64]") {
@@ -1301,7 +1301,7 @@ TEST_CASE("A64: Optimization failure when folding ADD", "[a64]") {
jit.SetPstate(0x30000000);
env.ticks_left = 6;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 0x46e15845dba57924);
REQUIRE(jit.GetRegister(1) == 0x6f60d04350581fea);
@@ -1364,7 +1364,7 @@ TEST_CASE("A64: Cache Maintenance Instructions", "[a64]") {
env.code_mem.emplace_back(0x14000000); // B .
env.ticks_left = 3;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
}
TEST_CASE("A64: Memory access (fastmem)", "[a64]") {
@@ -1407,7 +1407,7 @@ TEST_CASE("A64: Memory access (fastmem)", "[a64]") {
jit.SetPstate(0x30000000);
env.ticks_left = 5;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(strncmp(backing_memory + 0x100, backing_memory + 0x1F0, 23) == 0);
}
@@ -1427,7 +1427,7 @@ TEST_CASE("A64: SQRDMULH QC flag when output invalidated", "[a64]") {
jit.SetFpcr(0x05400000);
env.ticks_left = 3;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetFpsr() == 0x08000000);
REQUIRE(jit.GetVector(11) == Vector{0xb4cb'4fec'8563'1032, 0x0000'0000'0000'0000});
@@ -1448,7 +1448,7 @@ TEST_CASE("A64: SDIV maximally", "[a64]") {
jit.SetPC(0);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 0xffffffffffffffff);
REQUIRE(jit.GetRegister(1) == 0x8000000000000000);
@@ -1539,7 +1539,7 @@ TEST_CASE("A64: rand1", "[a64]") {
jit.SetFpcr(0x01080000);
env.ticks_left = 16;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 0x67e1d59cc30a788c);
REQUIRE(jit.GetRegister(1) == 0x0e771a2a79dfb060);
@@ -1605,7 +1605,7 @@ TEST_CASE("A64: rand3", "[a64]") {
jit.SetFpcr(0x01000000);
env.ticks_left = 110;
//jit.DumpDisassembly();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
}
TEST_CASE("A64: rand2", "[a64][.]") {
@@ -1707,7 +1707,7 @@ TEST_CASE("A64: rand2", "[a64][.]") {
jit.SetFpcr(0x01000000);
env.ticks_left = 110;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0) == Vector{0x0101010211914707, 0x090000007fd9991a});
REQUIRE(jit.GetVector(1) == Vector{0x00000000fffffffe, 0x0000000000000000});
@@ -1779,7 +1779,7 @@ TEST_CASE("A64: SABD", "[a64]") {
jit.SetVector(8, vectors[8]);
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
CHECK(jit.GetVector(0) == vectors[0]);
CHECK(jit.GetVector(1) == vectors[1]);
@@ -1796,7 +1796,7 @@ TEST_CASE("A64: SABD", "[a64]") {
jit.SetVector(8, vectors[7]);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
CHECK(jit.GetVector(0) == vectors[0]);
CHECK(jit.GetVector(1) == vectors[1]);
@@ -1818,7 +1818,7 @@ TEST_CASE("A64: UZP{1,2}.2D", "[a64]") {
jit.SetVector(1, {0xA0A1A2A3A4A5A6A7, 0xB0B1B2B3B4B5B6B7});
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(2) == Vector{0xF0F1F2F3F4F5F6F7, 0xA0A1A2A3A4A5A6A7});
REQUIRE(jit.GetVector(3) == Vector{0xE0E1E2E3E4E5E6E7, 0xB0B1B2B3B4B5B6B7});
@@ -1841,7 +1841,7 @@ TEST_CASE("A64: UZP{1,2}.S", "[a64]") {
jit.SetVector(1, {0xA4A5A6A7'A0A1A2A3, 0xB4B5B6B7'B0B1B2B3});
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(2) == Vector{0xA0A1A2A3'F0F1F2F3, 0});
REQUIRE(jit.GetVector(3) == Vector{0xA4A5A6A7'F4F5F6F7, 0});
@@ -1866,7 +1866,7 @@ TEST_CASE("A64: UZP{1,2}.H", "[a64]") {
jit.SetVector(1, {0xA6A7'A4A5'A2A3'A0A1, 0xB6B7'B4B5'B2B3'B0B1});
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(2) == Vector{0xA4A5'A0A1'F4F5'F0F1, 0});
REQUIRE(jit.GetVector(3) == Vector{0xA6A7'A2A3'F6F7'F2F3, 0});
@@ -1891,7 +1891,7 @@ TEST_CASE("A64: UZP{1,2}.B", "[a64]") {
jit.SetVector(1, {0xA7'A6'A5'A4'A3'A2'A1'A0, 0xB7'B6'B5'B4'B3'B2'B1'B0});
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(2) == Vector{0xA6'A4'A2'A0'F6'F4'F2'F0, 0});
REQUIRE(jit.GetVector(3) == Vector{0xA7'A5'A3'A1'F7'F5'F3'F1, 0});
@@ -1932,7 +1932,7 @@ TEST_CASE("A64: {S,U}MIN.S, {S,U}MAX.S", "[a64]") {
jit.SetVector(1, vectors[1]);
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
CHECK(jit.GetVector(2) == vectors[2]);
CHECK(jit.GetVector(3) == vectors[3]);
@@ -1978,7 +1978,7 @@ TEST_CASE("A64: {S,U}MIN.H, {S,U}MAX.H", "[a64]") {
jit.SetVector(1, vectors[1]);
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
CHECK(jit.GetVector(2) == vectors[2]);
CHECK(jit.GetVector(3) == vectors[3]);
@@ -2024,7 +2024,7 @@ TEST_CASE("A64: {S,U}MIN.B, {S,U}MAX.B", "[a64]") {
jit.SetVector(1, vectors[1]);
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
CHECK(jit.GetVector(2) == vectors[2]);
CHECK(jit.GetVector(3) == vectors[3]);
@@ -2076,7 +2076,7 @@ TEST_CASE("A64: {S,U}MINP.S, {S,U}MAXP.S", "[a64]") {
jit.SetVector(1, vectors[1]);
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
CHECK(jit.GetVector(2) == vectors[2]);
CHECK(jit.GetVector(3) == vectors[3]);
@@ -2095,7 +2095,7 @@ TEST_CASE("A64: {S,U}MINP.S, {S,U}MAXP.S", "[a64]") {
jit.SetVector(1, vectors[11]);
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
CHECK(jit.GetVector(2) == vectors[2]);
CHECK(jit.GetVector(3) == vectors[3]);
@@ -2146,7 +2146,7 @@ TEST_CASE("A64: {S,U}MINP.H, {S,U}MAXP.H", "[a64]") {
jit.SetVector(1, vectors[1]);
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
CHECK(jit.GetVector(2) == vectors[2]);
CHECK(jit.GetVector(3) == vectors[3]);
@@ -2165,7 +2165,7 @@ TEST_CASE("A64: {S,U}MINP.H, {S,U}MAXP.H", "[a64]") {
jit.SetVector(1, vectors[11]);
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
CHECK(jit.GetVector(2) == vectors[2]);
CHECK(jit.GetVector(3) == vectors[3]);
@@ -2216,7 +2216,7 @@ TEST_CASE("A64: {S,U}MINP.B, {S,U}MAXP.B", "[a64]") {
jit.SetVector(1, vectors[1]);
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
CHECK(jit.GetVector(2) == vectors[2]);
CHECK(jit.GetVector(3) == vectors[3]);
@@ -2238,7 +2238,7 @@ TEST_CASE("A64: {S,U}MINP.B, {S,U}MAXP.B", "[a64]") {
jit.SetVector(1, vectors[11]);
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
CHECK(jit.GetVector(2) == vectors[2]);
CHECK(jit.GetVector(3) == vectors[3]);
@@ -2307,7 +2307,7 @@ TEST_CASE("A64: SQABS", "[a64]") {
jit.SetVector(13, Vector{0x89C1B48FBC43F53B, 0x5FDD5D671D399E2});
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
CHECK(jit.GetVector(0) == Vector{0x2B'7F'14'2A'77'32'7F'10, 0x63'16'7E'45'7F'33'42'04});
CHECK(FP::FPSR{(uint32_t)jit.GetRegister(0)}.QC() == 1);
@@ -2339,7 +2339,7 @@ TEST_CASE("A64: RBIT{16b}", "[a64]") {
jit.SetVector(2, { 0xcafedead, 0xbabebeef });
jit.SetPC(0); // at _start
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(1)[0] == 0x537f7bb5);
REQUIRE(jit.GetVector(1)[1] == 0x5d7d7df7);
REQUIRE(jit.GetVector(2)[0] == 0xcafedead);
@@ -2360,7 +2360,7 @@ TEST_CASE("A64: CLZ{X}", "[a64]") {
jit.SetRegister(5, 0x07fffffeffeffef0);
jit.SetPC(0); // at _start
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 0);
REQUIRE(jit.GetRegister(1) == 4);
REQUIRE(jit.GetRegister(2) == 5);
@@ -2380,7 +2380,7 @@ TEST_CASE("A64: CLZ{W}", "[a64]") {
jit.SetRegister(5, 0x07fffffe);
jit.SetPC(0); // at _start
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 0);
REQUIRE(jit.GetRegister(1) == 4);
REQUIRE(jit.GetRegister(2) == 5);
diff --git a/src/dynarmic/tests/A64/fp_min_max.cpp b/src/dynarmic/tests/A64/fp_min_max.cpp
index 3d997d956d..d8b45db807 100644
--- a/src/dynarmic/tests/A64/fp_min_max.cpp
+++ b/src/dynarmic/tests/A64/fp_min_max.cpp
@@ -87,7 +87,7 @@ void run_test(u32 instruction, Fn fn) {
jit.SetPC(0);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0)[0] == fn(test_case));
@@ -97,7 +97,7 @@ void run_test(u32 instruction, Fn fn) {
jit.SetPC(0);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0)[0] == fn(test_case));
@@ -109,7 +109,7 @@ void run_test(u32 instruction, Fn fn) {
jit.SetPC(0);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0)[0] == force_default_nan(fn(test_case)));
@@ -119,7 +119,7 @@ void run_test(u32 instruction, Fn fn) {
jit.SetPC(0);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0)[0] == force_default_nan(fn(test_case)));
}
@@ -136,7 +136,7 @@ void run_test(u32 instruction, Fn fn) {
jit.SetPC(0);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0)[0] == fn(test_case));
@@ -148,7 +148,7 @@ void run_test(u32 instruction, Fn fn) {
jit.SetPC(0);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetVector(0)[0] == force_default_nan(fn(test_case)));
}
diff --git a/src/dynarmic/tests/A64/fuzz_with_unicorn.cpp b/src/dynarmic/tests/A64/fuzz_with_unicorn.cpp
index 8eda62f21e..956e7905a5 100644
--- a/src/dynarmic/tests/A64/fuzz_with_unicorn.cpp
+++ b/src/dynarmic/tests/A64/fuzz_with_unicorn.cpp
@@ -198,7 +198,7 @@ static void RunTestInstance(Dynarmic::A64::Jit& jit, A64Unicorn& uni, A64TestEnv
uni.ClearPageCache();
jit_env.ticks_left = instructions.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
uni_env.ticks_left = instructions.size();
uni.Run();
diff --git a/src/dynarmic/tests/A64/misaligned_page_table.cpp b/src/dynarmic/tests/A64/misaligned_page_table.cpp
index 75ac41e06d..8235e14a67 100644
--- a/src/dynarmic/tests/A64/misaligned_page_table.cpp
+++ b/src/dynarmic/tests/A64/misaligned_page_table.cpp
@@ -24,7 +24,7 @@ TEST_CASE("misaligned load/store do not use page_table when detect_misaligned_ac
jit.SetRegister(0, 0x000000000b0afff8);
env.ticks_left = 2;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
// If we don't crash we're fine.
}
diff --git a/src/dynarmic/tests/A64/real_world.cpp b/src/dynarmic/tests/A64/real_world.cpp
index b9eb1c464b..07532d95af 100644
--- a/src/dynarmic/tests/A64/real_world.cpp
+++ b/src/dynarmic/tests/A64/real_world.cpp
@@ -62,7 +62,7 @@ TEST_CASE("high register pressure proper handling with block linking 1", "[a64][
env.code_mem = { 0x90000008, 0x91230108, 0xb860d909, 0xb861d90a, 0x0b0a0129, 0xb820d909, 0x1b017c00, 0xb94003e1, 0x1b027c00, 0x1b037c00, 0x1b047c00, 0x1b057c00, 0x1b067c00, 0x1b077c00, 0x1b017c00, 0xb9400be1, 0x1b017c00, 0xb94013e1, 0x1b017c00, 0xb9401be1, 0x1b017c00, 0xd65f03c0, 0xd503201f, 0xd503201f, 0xa9a27bfd, 0x90000000, 0x91230000, 0x910003fd, 0xa90153f3, 0xa9025bf5, 0xa90363f7, 0xa9046bf9, 0xa90573fb, 0x29408c01, 0x2941b40e, 0xb863d804, 0xb861d802, 0x2942ac0c, 0x0b040042, 0x1b037c24, 0x2943a40a, 0x29449c08, 0x1b0e7c84, 0x29459406, 0xb821d802, 0x1b0d7c84, 0x29408c01, 0x2941b40e, 0x1b0c7c84, 0x1b0b7c84, 0x2942ac0c, 0x1b0a7c84, 0x1b097c84, 0x2943a40a, 0x1b087c84, 0x1b077c84, 0x29449c08, 0xb863d80f, 0x1b037c23, 0x1b067c84, 0xb861d802, 0x0b0f0042, 0x1b0e7c63, 0x1b057c84, 0x29459406, 0xb821d802, 0x1b0d7c63, 0x2943f002, 0x2940d801, 0x1b0c7c63, 0x2941e81b, 0x2942e019, 0x1b0b7c63, 0xb90067e2, 0x1b0a7c63, 0x1b097c63, 0x1b087c63, 0x1b077c63, 0x1b067c63, 0x1b057c63, 0x29449402, 0x290d17e2, 0xb876d805, 0xb861d802, 0x29459c06, 0x0b050042, 0xb821d802, 0x1b167c21, 0x290e1fe6, 0x2940d40c, 0x1b1b7c21, 0x2941a408, 0x290f27e8, 0x2942ac0a, 0x1b1a7c21, 0xb86cd802, 0xb875d805, 0x29102fea, 0x0b050042, 0x1b197c21, 0x2943b80d, 0x29113bed, 0x2944c00f, 0x291243ef, 0x1b187c21, 0x2945c811, 0xb82cd802, 0x29134bf1, 0x1b157d8c, 0x2941f813, 0x2940d00b, 0x29147bf3, 0x29429402, 0x291517e2, 0x29439c06, 0x29161fe6, 0x2944a408, 0xb874d805, 0xb86bd802, 0x291727e8, 0x0b050042, 0x2945b80a, 0xb82bd802, 0x29183bea, 0x1b147d6b, 0x2941c00f, 0x2940cc0a, 0x291943ef, 0x2942c811, 0x291a4bf1, 0x2943881e, 0x291b0bfe, 0x29449805, 0x291c1be5, 0x2945a007, 0x291d23e7, 0xb86ad802, 0xb873d805, 0x0b050042, 0xb82ad802, 0x1b137d4a, 0x2941b80d, 0x2940f809, 0x291e3bed, 0x2942c00f, 0x291f43ef, 0x2943c811, 0xb90103f1, 0xb90107f2, 0x29449402, 0xb9010be2, 0xb9010fe5, 0xb869d802, 0xb87ed805, 0x29459c06, 0x0b050042, 0xb829d802, 0x1b1e7d29, 0xb90113e6, 0xb90117e7, 0x2941bc0e, 0x2940c808, 0xb9011bee, 0xb9011fef, 0x2942c410, 0xb90123f0, 0xb90127f1, 0x29439402, 0xb9012be2, 0xb9012fe5, 0xb868d802, 0x29449c06, 0xb90133e6, 0xb90137e7, 0xb872d805, 0x2945b80d, 0x0b050042, 0xb828d802, 0x1b127d08, 0xb9013bed, 0xb9013fee, 0x2941c00f, 0x2940c407, 0xb90143ef, 0xb90147f0, 0x29429402, 0xb9014be2, 0xb9014fe5, 0x2943b806, 0xb90153e6, 0xb90157ee, 0x2944c00f, 0xb9015bef, 0xb9015ff0, 0x29459402, 0xb90163e2, 0xb867d802, 0xb90167e5, 0xb871d805, 0x0b050042, 0xb827d802, 0x1b117ce7, 0x2940c002, 0x2941b406, 0xb9016be6, 0xb9016fed, 0x2942bc0e, 0xb90173ee, 0xb90177ef, 0x29439805, 0xb9017be5, 0xb9017fe6, 0x2944bc0e, 0xb90183ee, 0xb90187ef, 0x29459805, 0xb9018be5, 0xb862d805, 0xb9018fe6, 0xb870d806, 0x0b0600a5, 0xb822d805, 0x1b107c42, 0x2941b80d, 0x2940bc06, 0xb90193ed, 0xb90197ee, 0x2942b805, 0xb9019be5, 0xb9019fee, 0x2943b405, 0xb901a3e5, 0xb901a7ed, 0xb86fd80d, 0x2944940e, 0xb901abee, 0xb901afe5, 0x2945940e, 0xb901b7e5, 0xb866d805, 0xb901b3ee, 0x0b0d00a5, 0xb826d805, 0x2941dc0d, 0x2940b805, 0xb901bbed, 0xb901bff7, 0x2942b417, 0xb901c3f7, 0xb901c7ed, 0x2943b417, 0xb901cbf7, 0xb901cfed, 0x2944b417, 0xb901d3f7, 0xb901d7ed, 0x2945b417, 0xb901dbf7, 0xb86ed817, 0xb901dfed, 0xb865d80d, 0x0b1701ad, 0xb825d80d, 0xb863d817, 0x1b047c63, 0xb864d80d, 0x0b1701ad, 0xb824d80d, 0xb94067e0, 0xb9408bed, 0x1b007c21, 0xb9406be0, 0x1b1c7c21, 0x1b007c21, 0xb9406fe0, 0x1b007c21, 0xb94073e0, 0x1b007c21, 0xb94077e0, 0x1b007c21, 0xb9407be0, 0x1b007d8c, 0xb9407fe0, 0x1b037c21, 0x1b007d8c, 0xb94083e0, 0x1b007d8c, 0xb94087e0, 0x1b007d8c, 0xb9408fe0, 0x1b0d7d8c, 0xb940f3ed, 0x1b007d8c, 0xb94093e0, 0x1b0d7d29, 0x1b007d8c, 0xb94097e0, 0x1b007d8c, 0xb9409be0, 0x1b007d8c, 0xb9409fe0, 0x1b007d8c, 0xb940a3e0, 0x1b007d6b, 0xb940a7e0, 0x1b0c7c21, 0x1b007d6b, 0xb940abe0, 0x1b007d6b, 0xb940afe0, 0x1b007d6b, 0xb940b3e0, 0x1b007d6b, 0xb940b7e0, 0x1b007d6b, 0xb940bbe0, 0xb9413bed, 0x1b007d6b, 0xb940bfe0, 0x1b007d6b, 0xb940c3e0, 0x1b007d6b, 0xb940c7e0, 0x1b007d6b, 0xb940cbe0, 0x1b007d4a, 0xb940cfe0, 0x1b0b7c21, 0x1b007d4a, 0xb940d3e0, 0x1b007d4a, 0xb940d7e0, 0x1b007d4a, 0xb940dbe0, 0x1b007d4a, 0xb940dfe0, 0x1b007d4a, 0xb940e3e0, 0x1b007d4a, 0xb940e7e0, 0x1b007d4a, 0xb940ebe0, 0x1b007d4a, 0xb940efe0, 0x1b007d4a, 0xb940f7e0, 0x1b007d29, 0xb940fbe0, 0x1b0a7c21, 0x1b007d29, 0x295f8fe0, 0x1b007d20, 0x1b037c00, 0xb94107e3, 0x1b037c00, 0xb9410be3, 0x1b037c00, 0xb9410fe3, 0x1b037c00, 0xb94113e3, 0x1b037c00, 0xb94117e3, 0x1b037c00, 0x1b007c21, 0xb9411be0, 0x1b007d08, 0xb9411fe0, 0x1b007d08, 0xb94123e0, 0x1b007d08, 0xb94127e0, 0x1b007d08, 0xb9412be0, 0x1b007d08, 0xb9412fe0, 0x1b007d08, 0xb94133e0, 0x1b007d08, 0xb94137e0, 0x1b007d08, 0xb9413fe0, 0xb941bff7, 0xa94153f3, 0x1b0d7d08, 0xb9416fed, 0xa9425bf5, 0xa9446bf9, 0x1b007d08, 0xb94143e0, 0x1b087c21, 0x1b007ce7, 0xb94147e0, 0x1b007ce7, 0xb9414be0, 0x1b007ce7, 0xb9414fe0, 0x1b007ce7, 0xb94153e0, 0x1b007ce7, 0xb94157e0, 0x1b007ce7, 0xb9415be0, 0x1b007ce7, 0xb9415fe0, 0x1b007ce7, 0xb94163e0, 0x1b007ce7, 0xb94167e0, 0x1b007ce7, 0xb9416be0, 0x1b007c42, 0xb94173e0, 0x1b077c21, 0x1b0d7c42, 0xb94193ed, 0x1b007c42, 0xb94177e0, 0x1b007c42, 0xb9417be0, 0x1b007c42, 0xb9417fe0, 0x1b007c42, 0xb94183e0, 0x1b007c40, 0xb94187e2, 0x1b027c00, 0xb9418be2, 0x1b027c00, 0xb9418fe2, 0x1b027c00, 0xb94197e2, 0x1b007c20, 0x1b0f7cc1, 0x1b0d7c21, 0xb941a7ed, 0x1b027c21, 0xb9419be2, 0x1b027c21, 0xb9419fe2, 0xa94573fb, 0x1b027c21, 0xb941a3e2, 0x1b027c21, 0xb941abe2, 0x1b0d7c21, 0xb941bbed, 0x1b027c21, 0xb941afe2, 0x1b027c21, 0xb941b3e2, 0x1b027c21, 0xb941b7e2, 0x1b027c21, 0x1b017c01, 0x1b0e7ca0, 0x1b0d7c00, 0xb941c7ed, 0x1b177c00, 0xb941c3f7, 0x1b177c00, 0xb941cbf7, 0x1b0d7c00, 0xb941cfed, 0x1b177c00, 0xb941d3f7, 0x1b0d7c00, 0xb941d7ed, 0x1b177c00, 0xb941dbf7, 0x1b0d7c00, 0xb941dfed, 0x1b177c00, 0xa94363f7, 0xa8de7bfd, 0x1b0d7c00, 0x1b007c20, 0x14000000 };
jit.SetPC(0x60); // at _start
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 0);
}
@@ -98,5 +98,5 @@ TEST_CASE("Block branching (unpredictable)", "[a64][c]") {
}
jit.SetPC(0); // at _start
env.ticks_left = env.code_mem.size();
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
}
diff --git a/src/dynarmic/tests/A64/test_invalidation.cpp b/src/dynarmic/tests/A64/test_invalidation.cpp
index cba47dd8ca..168043c1cb 100644
--- a/src/dynarmic/tests/A64/test_invalidation.cpp
+++ b/src/dynarmic/tests/A64/test_invalidation.cpp
@@ -27,38 +27,38 @@ TEST_CASE("ensure fast dispatch entry is cleared even when a block does not have
jit.SetPC(100);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 42);
jit.SetPC(100);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 42);
jit.InvalidateCacheRange(108, 4);
jit.SetPC(100);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 42);
env.code_mem[2] = 0xd28008a0; // MOV X0, 69
jit.SetPC(100);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 42);
jit.InvalidateCacheRange(108, 4);
jit.SetPC(100);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 69);
jit.SetPC(100);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 69);
}
@@ -77,37 +77,37 @@ TEST_CASE("ensure fast dispatch entry is cleared even when a block does not have
jit.SetPC(0);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 42);
jit.SetPC(0);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 42);
jit.InvalidateCacheRange(8, 4);
jit.SetPC(0);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 42);
env.code_mem[2] = 0xd28008a0; // MOV X0, 69
jit.SetPC(0);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 42);
jit.InvalidateCacheRange(8, 4);
jit.SetPC(0);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 69);
jit.SetPC(0);
env.ticks_left = 4;
- jit.Run();
+ CheckedRun([&]() { jit.Run(); });
REQUIRE(jit.GetRegister(0) == 69);
}
diff --git a/src/dynarmic/tests/A64/testenv.h b/src/dynarmic/tests/A64/testenv.h
index 8662fc7921..31e338b138 100644
--- a/src/dynarmic/tests/A64/testenv.h
+++ b/src/dynarmic/tests/A64/testenv.h
@@ -8,13 +8,11 @@
#pragma once
-#include
#include
-
#include "dynarmic/common/assert.h"
#include "dynarmic/common/common_types.h"
-
#include "dynarmic/interface/A64/a64.h"
+#include "../native/testenv.h"
using Vector = Dynarmic::A64::Vector;
@@ -135,8 +133,7 @@ public:
char* backing_memory = nullptr;
bool ignore_invalid_insn = false;
- explicit A64FastmemTestEnv(char* addr)
- : backing_memory(addr) {}
+ explicit A64FastmemTestEnv(char* addr) : backing_memory(addr) {}
template
T read(u64 vaddr) {
diff --git a/src/dynarmic/tests/CMakeLists.txt b/src/dynarmic/tests/CMakeLists.txt
index a53d4389dc..85d86c7966 100644
--- a/src/dynarmic/tests/CMakeLists.txt
+++ b/src/dynarmic/tests/CMakeLists.txt
@@ -67,11 +67,14 @@ endif()
if ("x86_64" IN_LIST ARCHITECTURE)
target_link_libraries(dynarmic_tests PRIVATE xbyak::xbyak)
-
target_architecture_specific_sources(dynarmic_tests "x86_64"
x64_cpu_info.cpp
)
+ target_architecture_specific_sources(dynarmic_tests "x86_64"
+ native/preserve_xmm.cpp
+ )
+
if (NOT MSVC AND NOT DYNARMIC_MULTIARCH_BUILD)
target_sources(dynarmic_tests PRIVATE
rsqrt_test.cpp
@@ -130,4 +133,6 @@ target_include_directories(dynarmic_tests PRIVATE . ../src)
target_compile_options(dynarmic_tests PRIVATE ${DYNARMIC_CXX_FLAGS})
target_compile_definitions(dynarmic_tests PRIVATE FMT_USE_USER_DEFINED_LITERALS=1)
+target_compile_options(dynarmic_tests PRIVATE -mavx2)
+
add_test(dynarmic_tests dynarmic_tests --durations yes)
diff --git a/src/dynarmic/tests/native/preserve_xmm.cpp b/src/dynarmic/tests/native/preserve_xmm.cpp
new file mode 100644
index 0000000000..0f69697b7a
--- /dev/null
+++ b/src/dynarmic/tests/native/preserve_xmm.cpp
@@ -0,0 +1,64 @@
+// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#include
+#include
+#include
+
+#include "../A64/testenv.h"
+#include "dynarmic/common/fp/fpsr.h"
+#include "dynarmic/interface/exclusive_monitor.h"
+
+using namespace Dynarmic;
+using namespace oaknut::util;
+
+TEST_CASE("X86: Preserve XMM regs", "[x86]") {
+ A64TestEnv env;
+ A64::UserConfig jit_user_config{};
+ jit_user_config.callbacks = &env;
+ A64::Jit jit{jit_user_config};
+
+ oaknut::VectorCodeGenerator code{env.code_mem, nullptr};
+ code.SMINP(V2.S2(), V0.S2(), V1.S2());
+ code.UMINP(V3.S2(), V0.S2(), V1.S2());
+ code.SMINP(V4.S4(), V0.S4(), V1.S4());
+ code.UMINP(V5.S4(), V0.S4(), V1.S4());
+ code.SMAXP(V6.S2(), V0.S2(), V1.S2());
+ code.UMAXP(V7.S2(), V0.S2(), V1.S2());
+ code.SMAXP(V8.S4(), V0.S4(), V1.S4());
+ code.UMAXP(V9.S4(), V0.S4(), V1.S4());
+
+ constexpr std::array vectors = {
+ // initial input vectors [0-1]
+ Vector{0x00000003'00000002, 0xF1234567'01234567},
+ Vector{0x80000000'7FFFFFFF, 0x76543210'76543209},
+ // expected output vectors [2-9]
+ Vector{0x80000000'00000002, 0},
+ Vector{0x7FFFFFFF'00000002, 0},
+ Vector{0xF1234567'00000002, 0x76543209'80000000},
+ Vector{0x01234567'00000002, 0x76543209'7FFFFFFF},
+ Vector{0x7FFFFFFF'00000003, 0},
+ Vector{0x80000000'00000003, 0},
+ Vector{0x01234567'00000003, 0x76543210'7FFFFFFF},
+ Vector{0xF1234567'00000003, 0x76543210'80000000},
+ // input vectors with elements swapped pairwise [10-11]
+ Vector{0x00000002'00000003, 0x01234567'F1234567},
+ Vector{0x7FFFFFFF'80000000, 0x76543209'76543210},
+ };
+
+ jit.SetPC(0);
+ jit.SetVector(0, vectors[0]);
+ jit.SetVector(1, vectors[1]);
+
+ env.ticks_left = env.code_mem.size();
+ CheckedRun([&]() { jit.Run(); });
+
+ CHECK(jit.GetVector(2) == vectors[2]);
+ CHECK(jit.GetVector(3) == vectors[3]);
+ CHECK(jit.GetVector(4) == vectors[4]);
+ CHECK(jit.GetVector(5) == vectors[5]);
+ CHECK(jit.GetVector(6) == vectors[6]);
+ CHECK(jit.GetVector(7) == vectors[7]);
+ CHECK(jit.GetVector(8) == vectors[8]);
+ CHECK(jit.GetVector(9) == vectors[9]);
+}
diff --git a/src/dynarmic/tests/native/testenv.h b/src/dynarmic/tests/native/testenv.h
new file mode 100644
index 0000000000..e7de208aff
--- /dev/null
+++ b/src/dynarmic/tests/native/testenv.h
@@ -0,0 +1,50 @@
+#pragma once
+
+#include
+#ifdef __AVX__
+#include
+#endif
+template
+void CheckedRun(F&& fn) {
+#ifdef __AVX__
+ __m256 xmm0 = _mm256_set_epi32(0, 0, 0, 0, 0, 0, 0, 0);
+ __m256 xmm1 = _mm256_set_epi32(1, 1, 0, 0, 0, 0, 0, 1);
+ __m256 xmm2 = _mm256_set_epi32(2, 2, 0, 0, 0, 0, 0, 2);
+ __m256 xmm3 = _mm256_set_epi32(3, 3, 0, 0, 0, 0, 0, 3);
+ __m256 xmm4 = _mm256_set_epi32(4, 4, 0, 0, 0, 0, 0, 4);
+ __m256 xmm5 = _mm256_set_epi32(4, 4, 0, 0, 0, 0, 0, 5);
+ __m256 xmm6 = _mm256_set_epi32(4, 4, 0, 0, 0, 0, 0, 6);
+ __m256 xmm7 = _mm256_set_epi32(4, 4, 0, 0, 0, 0, 0, 7);
+ __m256 xmm8 = _mm256_set_epi32(4, 4, 0, 0, 0, 0, 0, 8);
+ __m256 xmm9 = _mm256_set_epi32(4, 4, 0, 0, 0, 0, 0, 9);
+ __m256 xmm10 = _mm256_set_epi32(4, 4, 0, 0, 0, 0, 0, 10);
+ __m256 xmm11 = _mm256_set_epi32(4, 4, 0, 0, 0, 0, 0, 11);
+ asm volatile(""
+ : "+x"(xmm0), "+x"(xmm1), "+x"(xmm2), "+x"(xmm3)
+ , "+x"(xmm4), "+x"(xmm5), "+x"(xmm6), "+x"(xmm7)
+ , "+x"(xmm8), "+x"(xmm9), "+x"(xmm10), "+x"(xmm11)
+ :
+ );
+ fn();
+ asm volatile(""
+ : "+x"(xmm0), "+x"(xmm1), "+x"(xmm2), "+x"(xmm3)
+ , "+x"(xmm4), "+x"(xmm5), "+x"(xmm6), "+x"(xmm7)
+ , "+x"(xmm8), "+x"(xmm9), "+x"(xmm10), "+x"(xmm11)
+ :
+ );
+ CHECK(std::bit_cast(xmm0[0]) == 0);
+ CHECK(std::bit_cast(xmm1[0]) == 1);
+ CHECK(std::bit_cast(xmm2[0]) == 2);
+ CHECK(std::bit_cast(xmm3[0]) == 3);
+ CHECK(std::bit_cast(xmm4[0]) == 4);
+ CHECK(std::bit_cast(xmm5[0]) == 5);
+ CHECK(std::bit_cast(xmm6[0]) == 6);
+ CHECK(std::bit_cast(xmm7[0]) == 7);
+ CHECK(std::bit_cast(xmm8[0]) == 8);
+ CHECK(std::bit_cast(xmm9[0]) == 9);
+ CHECK(std::bit_cast(xmm10[0]) == 10);
+ CHECK(std::bit_cast(xmm11[0]) == 11);
+#else
+ fn();
+#endif
+}
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